config.ini revision 8835
1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 19physmem=system.physmem 20readfile= 21symbolfile= 22work_begin_ckpt_count=0 23work_begin_cpu_id_exit=-1 24work_begin_exit_count=0 25work_cpus_ckpt_count=0 26work_end_ckpt_count=0 27work_end_exit_count=0 28work_item_id=-1 29system_port=system.membus.port[0] 30 31[system.cpu] 32type=DerivO3CPU 33children=dcache dtb fuPool icache interrupts itb l2cache toL2Bus tracer workload 34BTBEntries=4096 35BTBTagSize=16 36LFSTSize=1024 37LQEntries=32 38LSQCheckLoads=true 39LSQDepCheckShift=4 40RASSize=16 41SQEntries=32 42SSITSize=1024 43activity=0 44backComSize=5 45cachePorts=200 46checker=Null 47choiceCtrBits=2 48choicePredictorSize=8192 49clock=500 50commitToDecodeDelay=1 51commitToFetchDelay=1 52commitToIEWDelay=1 53commitToRenameDelay=1 54commitWidth=8 55cpu_id=0 56decodeToFetchDelay=1 57decodeToRenameDelay=1 58decodeWidth=8 59defer_registration=false 60dispatchWidth=8 61do_checkpoint_insts=true 62do_quiesce=true 63do_statistics_insts=true 64dtb=system.cpu.dtb 65fetchToDecodeDelay=1 66fetchTrapLatency=1 67fetchWidth=8 68forwardComSize=5 69fuPool=system.cpu.fuPool 70function_trace=false 71function_trace_start=0 72globalCtrBits=2 73globalHistoryBits=13 74globalPredictorSize=8192 75iewToCommitDelay=1 76iewToDecodeDelay=1 77iewToFetchDelay=1 78iewToRenameDelay=1 79instShiftAmt=2 80interrupts=system.cpu.interrupts 81issueToExecuteDelay=1 82issueWidth=8 83itb=system.cpu.itb 84localCtrBits=2 85localHistoryBits=11 86localHistoryTableSize=2048 87localPredictorSize=2048 88max_insts_all_threads=0 89max_insts_any_thread=0 90max_loads_all_threads=0 91max_loads_any_thread=0 92needsTSO=true 93numIQEntries=64 94numPhysFloatRegs=256 95numPhysIntRegs=256 96numROBEntries=192 97numRobs=1 98numThreads=1 99phase=0 100predType=tournament 101profile=0 102progress_interval=0 103renameToDecodeDelay=1 104renameToFetchDelay=1 105renameToIEWDelay=2 106renameToROBDelay=1 107renameWidth=8 108smtCommitPolicy=RoundRobin 109smtFetchPolicy=SingleThread 110smtIQPolicy=Partitioned 111smtIQThreshold=100 112smtLSQPolicy=Partitioned 113smtLSQThreshold=100 114smtNumFetchingThreads=1 115smtROBPolicy=Partitioned 116smtROBThreshold=100 117squashWidth=8 118store_set_clear_period=250000 119system=system 120tracer=system.cpu.tracer 121trapLatency=13 122wbDepth=1 123wbWidth=8 124workload=system.cpu.workload 125dcache_port=system.cpu.dcache.cpu_side 126icache_port=system.cpu.icache.cpu_side 127 128[system.cpu.dcache] 129type=BaseCache 130addr_range=0:18446744073709551615 131assoc=2 132block_size=64 133forward_snoops=true 134hash_delay=1 135is_top_level=true 136latency=1000 137max_miss_count=0 138mshrs=10 139prefetch_on_access=false 140prefetcher=Null 141prioritizeRequests=false 142repl=Null 143size=262144 144subblock_size=0 145system=system 146tgts_per_mshr=20 147trace_addr=0 148two_queue=false 149write_buffers=8 150cpu_side=system.cpu.dcache_port 151mem_side=system.cpu.toL2Bus.port[1] 152 153[system.cpu.dtb] 154type=X86TLB 155children=walker 156size=64 157walker=system.cpu.dtb.walker 158 159[system.cpu.dtb.walker] 160type=X86PagetableWalker 161system=system 162port=system.cpu.toL2Bus.port[3] 163 164[system.cpu.fuPool] 165type=FUPool 166children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 167FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 168 169[system.cpu.fuPool.FUList0] 170type=FUDesc 171children=opList 172count=6 173opList=system.cpu.fuPool.FUList0.opList 174 175[system.cpu.fuPool.FUList0.opList] 176type=OpDesc 177issueLat=1 178opClass=IntAlu 179opLat=1 180 181[system.cpu.fuPool.FUList1] 182type=FUDesc 183children=opList0 opList1 184count=2 185opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 186 187[system.cpu.fuPool.FUList1.opList0] 188type=OpDesc 189issueLat=1 190opClass=IntMult 191opLat=3 192 193[system.cpu.fuPool.FUList1.opList1] 194type=OpDesc 195issueLat=19 196opClass=IntDiv 197opLat=20 198 199[system.cpu.fuPool.FUList2] 200type=FUDesc 201children=opList0 opList1 opList2 202count=4 203opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 204 205[system.cpu.fuPool.FUList2.opList0] 206type=OpDesc 207issueLat=1 208opClass=FloatAdd 209opLat=2 210 211[system.cpu.fuPool.FUList2.opList1] 212type=OpDesc 213issueLat=1 214opClass=FloatCmp 215opLat=2 216 217[system.cpu.fuPool.FUList2.opList2] 218type=OpDesc 219issueLat=1 220opClass=FloatCvt 221opLat=2 222 223[system.cpu.fuPool.FUList3] 224type=FUDesc 225children=opList0 opList1 opList2 226count=2 227opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 228 229[system.cpu.fuPool.FUList3.opList0] 230type=OpDesc 231issueLat=1 232opClass=FloatMult 233opLat=4 234 235[system.cpu.fuPool.FUList3.opList1] 236type=OpDesc 237issueLat=12 238opClass=FloatDiv 239opLat=12 240 241[system.cpu.fuPool.FUList3.opList2] 242type=OpDesc 243issueLat=24 244opClass=FloatSqrt 245opLat=24 246 247[system.cpu.fuPool.FUList4] 248type=FUDesc 249children=opList 250count=0 251opList=system.cpu.fuPool.FUList4.opList 252 253[system.cpu.fuPool.FUList4.opList] 254type=OpDesc 255issueLat=1 256opClass=MemRead 257opLat=1 258 259[system.cpu.fuPool.FUList5] 260type=FUDesc 261children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 262count=4 263opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 264 265[system.cpu.fuPool.FUList5.opList00] 266type=OpDesc 267issueLat=1 268opClass=SimdAdd 269opLat=1 270 271[system.cpu.fuPool.FUList5.opList01] 272type=OpDesc 273issueLat=1 274opClass=SimdAddAcc 275opLat=1 276 277[system.cpu.fuPool.FUList5.opList02] 278type=OpDesc 279issueLat=1 280opClass=SimdAlu 281opLat=1 282 283[system.cpu.fuPool.FUList5.opList03] 284type=OpDesc 285issueLat=1 286opClass=SimdCmp 287opLat=1 288 289[system.cpu.fuPool.FUList5.opList04] 290type=OpDesc 291issueLat=1 292opClass=SimdCvt 293opLat=1 294 295[system.cpu.fuPool.FUList5.opList05] 296type=OpDesc 297issueLat=1 298opClass=SimdMisc 299opLat=1 300 301[system.cpu.fuPool.FUList5.opList06] 302type=OpDesc 303issueLat=1 304opClass=SimdMult 305opLat=1 306 307[system.cpu.fuPool.FUList5.opList07] 308type=OpDesc 309issueLat=1 310opClass=SimdMultAcc 311opLat=1 312 313[system.cpu.fuPool.FUList5.opList08] 314type=OpDesc 315issueLat=1 316opClass=SimdShift 317opLat=1 318 319[system.cpu.fuPool.FUList5.opList09] 320type=OpDesc 321issueLat=1 322opClass=SimdShiftAcc 323opLat=1 324 325[system.cpu.fuPool.FUList5.opList10] 326type=OpDesc 327issueLat=1 328opClass=SimdSqrt 329opLat=1 330 331[system.cpu.fuPool.FUList5.opList11] 332type=OpDesc 333issueLat=1 334opClass=SimdFloatAdd 335opLat=1 336 337[system.cpu.fuPool.FUList5.opList12] 338type=OpDesc 339issueLat=1 340opClass=SimdFloatAlu 341opLat=1 342 343[system.cpu.fuPool.FUList5.opList13] 344type=OpDesc 345issueLat=1 346opClass=SimdFloatCmp 347opLat=1 348 349[system.cpu.fuPool.FUList5.opList14] 350type=OpDesc 351issueLat=1 352opClass=SimdFloatCvt 353opLat=1 354 355[system.cpu.fuPool.FUList5.opList15] 356type=OpDesc 357issueLat=1 358opClass=SimdFloatDiv 359opLat=1 360 361[system.cpu.fuPool.FUList5.opList16] 362type=OpDesc 363issueLat=1 364opClass=SimdFloatMisc 365opLat=1 366 367[system.cpu.fuPool.FUList5.opList17] 368type=OpDesc 369issueLat=1 370opClass=SimdFloatMult 371opLat=1 372 373[system.cpu.fuPool.FUList5.opList18] 374type=OpDesc 375issueLat=1 376opClass=SimdFloatMultAcc 377opLat=1 378 379[system.cpu.fuPool.FUList5.opList19] 380type=OpDesc 381issueLat=1 382opClass=SimdFloatSqrt 383opLat=1 384 385[system.cpu.fuPool.FUList6] 386type=FUDesc 387children=opList 388count=0 389opList=system.cpu.fuPool.FUList6.opList 390 391[system.cpu.fuPool.FUList6.opList] 392type=OpDesc 393issueLat=1 394opClass=MemWrite 395opLat=1 396 397[system.cpu.fuPool.FUList7] 398type=FUDesc 399children=opList0 opList1 400count=4 401opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 402 403[system.cpu.fuPool.FUList7.opList0] 404type=OpDesc 405issueLat=1 406opClass=MemRead 407opLat=1 408 409[system.cpu.fuPool.FUList7.opList1] 410type=OpDesc 411issueLat=1 412opClass=MemWrite 413opLat=1 414 415[system.cpu.fuPool.FUList8] 416type=FUDesc 417children=opList 418count=1 419opList=system.cpu.fuPool.FUList8.opList 420 421[system.cpu.fuPool.FUList8.opList] 422type=OpDesc 423issueLat=3 424opClass=IprAccess 425opLat=3 426 427[system.cpu.icache] 428type=BaseCache 429addr_range=0:18446744073709551615 430assoc=2 431block_size=64 432forward_snoops=true 433hash_delay=1 434is_top_level=true 435latency=1000 436max_miss_count=0 437mshrs=10 438prefetch_on_access=false 439prefetcher=Null 440prioritizeRequests=false 441repl=Null 442size=131072 443subblock_size=0 444system=system 445tgts_per_mshr=20 446trace_addr=0 447two_queue=false 448write_buffers=8 449cpu_side=system.cpu.icache_port 450mem_side=system.cpu.toL2Bus.port[0] 451 452[system.cpu.interrupts] 453type=X86LocalApic 454int_latency=1000 455pio_addr=2305843009213693952 456pio_latency=1000 457system=system 458int_port=system.membus.port[4] 459pio=system.membus.port[3] 460 461[system.cpu.itb] 462type=X86TLB 463children=walker 464size=64 465walker=system.cpu.itb.walker 466 467[system.cpu.itb.walker] 468type=X86PagetableWalker 469system=system 470port=system.cpu.toL2Bus.port[2] 471 472[system.cpu.l2cache] 473type=BaseCache 474addr_range=0:18446744073709551615 475assoc=2 476block_size=64 477forward_snoops=true 478hash_delay=1 479is_top_level=false 480latency=1000 481max_miss_count=0 482mshrs=10 483prefetch_on_access=false 484prefetcher=Null 485prioritizeRequests=false 486repl=Null 487size=2097152 488subblock_size=0 489system=system 490tgts_per_mshr=5 491trace_addr=0 492two_queue=false 493write_buffers=8 494cpu_side=system.cpu.toL2Bus.port[4] 495mem_side=system.membus.port[2] 496 497[system.cpu.toL2Bus] 498type=Bus 499block_size=64 500bus_id=0 501clock=1000 502header_cycles=1 503use_default_range=false 504width=64 505port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side 506 507[system.cpu.tracer] 508type=ExeTracer 509 510[system.cpu.workload] 511type=LiveProcess 512cmd=parser 2.1.dict -batch 513cwd=build/X86/tests/fast/long/se/20.parser/x86/linux/o3-timing 514egid=100 515env= 516errout=cerr 517euid=100 518executable=/dist/m5/cpu2000/binaries/x86/linux/parser 519gid=100 520input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in 521max_stack_size=67108864 522output=cout 523pid=100 524ppid=99 525simpoint=114600000000 526system=system 527uid=100 528 529[system.membus] 530type=Bus 531block_size=64 532bus_id=0 533clock=1000 534header_cycles=1 535use_default_range=false 536width=64 537port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side system.cpu.interrupts.pio system.cpu.interrupts.int_port 538 539[system.physmem] 540type=PhysicalMemory 541file= 542latency=30000 543latency_var=0 544null=false 545range=0:134217727 546zero=false 547port=system.membus.port[1] 548 549