config.ini revision 8825
1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 19physmem=system.physmem 20readfile= 21symbolfile= 22work_begin_ckpt_count=0 23work_begin_cpu_id_exit=-1 24work_begin_exit_count=0 25work_cpus_ckpt_count=0 26work_end_ckpt_count=0 27work_end_exit_count=0 28work_item_id=-1 29system_port=system.membus.port[0] 30 31[system.cpu] 32type=DerivO3CPU 33children=dcache dtb fuPool icache interrupts itb l2cache toL2Bus tracer workload 34BTBEntries=4096 35BTBTagSize=16 36LFSTSize=1024 37LQEntries=32 38LSQCheckLoads=true 39LSQDepCheckShift=4 40RASSize=16 41SQEntries=32 42SSITSize=1024 43activity=0 44backComSize=5 45cachePorts=200 46checker=Null 47choiceCtrBits=2 48choicePredictorSize=8192 49clock=500 50commitToDecodeDelay=1 51commitToFetchDelay=1 52commitToIEWDelay=1 53commitToRenameDelay=1 54commitWidth=8 55cpu_id=0 56decodeToFetchDelay=1 57decodeToRenameDelay=1 58decodeWidth=8 59defer_registration=false 60dispatchWidth=8 61do_checkpoint_insts=true 62do_quiesce=true 63do_statistics_insts=true 64dtb=system.cpu.dtb 65fetchToDecodeDelay=1 66fetchTrapLatency=1 67fetchWidth=8 68forwardComSize=5 69fuPool=system.cpu.fuPool 70function_trace=false 71function_trace_start=0 72globalCtrBits=2 73globalHistoryBits=13 74globalPredictorSize=8192 75iewToCommitDelay=1 76iewToDecodeDelay=1 77iewToFetchDelay=1 78iewToRenameDelay=1 79instShiftAmt=2 80interrupts=system.cpu.interrupts 81issueToExecuteDelay=1 82issueWidth=8 83itb=system.cpu.itb 84localCtrBits=2 85localHistoryBits=11 86localHistoryTableSize=2048 87localPredictorSize=2048 88max_insts_all_threads=0 89max_insts_any_thread=0 90max_loads_all_threads=0 91max_loads_any_thread=0 92needsTSO=true 93numIQEntries=64 94numPhysFloatRegs=256 95numPhysIntRegs=256 96numROBEntries=192 97numRobs=1 98numThreads=1 99phase=0 100predType=tournament 101profile=0 102progress_interval=0 103renameToDecodeDelay=1 104renameToFetchDelay=1 105renameToIEWDelay=2 106renameToROBDelay=1 107renameWidth=8 108smtCommitPolicy=RoundRobin 109smtFetchPolicy=SingleThread 110smtIQPolicy=Partitioned 111smtIQThreshold=100 112smtLSQPolicy=Partitioned 113smtLSQThreshold=100 114smtNumFetchingThreads=1 115smtROBPolicy=Partitioned 116smtROBThreshold=100 117squashWidth=8 118store_set_clear_period=250000 119system=system 120tracer=system.cpu.tracer 121trapLatency=13 122wbDepth=1 123wbWidth=8 124workload=system.cpu.workload 125dcache_port=system.cpu.dcache.cpu_side 126icache_port=system.cpu.icache.cpu_side 127 128[system.cpu.dcache] 129type=BaseCache 130addr_range=0:18446744073709551615 131assoc=2 132block_size=64 133forward_snoops=true 134hash_delay=1 135is_top_level=true 136latency=1000 137max_miss_count=0 138mshrs=10 139num_cpus=1 140prefetch_data_accesses_only=false 141prefetch_degree=1 142prefetch_latency=10000 143prefetch_on_access=false 144prefetch_past_page=false 145prefetch_policy=none 146prefetch_serial_squash=false 147prefetch_use_cpu_id=true 148prefetcher_size=100 149prioritizeRequests=false 150repl=Null 151size=262144 152subblock_size=0 153tgts_per_mshr=20 154trace_addr=0 155two_queue=false 156write_buffers=8 157cpu_side=system.cpu.dcache_port 158mem_side=system.cpu.toL2Bus.port[1] 159 160[system.cpu.dtb] 161type=X86TLB 162children=walker 163size=64 164walker=system.cpu.dtb.walker 165 166[system.cpu.dtb.walker] 167type=X86PagetableWalker 168system=system 169port=system.cpu.toL2Bus.port[3] 170 171[system.cpu.fuPool] 172type=FUPool 173children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 174FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 175 176[system.cpu.fuPool.FUList0] 177type=FUDesc 178children=opList 179count=6 180opList=system.cpu.fuPool.FUList0.opList 181 182[system.cpu.fuPool.FUList0.opList] 183type=OpDesc 184issueLat=1 185opClass=IntAlu 186opLat=1 187 188[system.cpu.fuPool.FUList1] 189type=FUDesc 190children=opList0 opList1 191count=2 192opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 193 194[system.cpu.fuPool.FUList1.opList0] 195type=OpDesc 196issueLat=1 197opClass=IntMult 198opLat=3 199 200[system.cpu.fuPool.FUList1.opList1] 201type=OpDesc 202issueLat=19 203opClass=IntDiv 204opLat=20 205 206[system.cpu.fuPool.FUList2] 207type=FUDesc 208children=opList0 opList1 opList2 209count=4 210opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 211 212[system.cpu.fuPool.FUList2.opList0] 213type=OpDesc 214issueLat=1 215opClass=FloatAdd 216opLat=2 217 218[system.cpu.fuPool.FUList2.opList1] 219type=OpDesc 220issueLat=1 221opClass=FloatCmp 222opLat=2 223 224[system.cpu.fuPool.FUList2.opList2] 225type=OpDesc 226issueLat=1 227opClass=FloatCvt 228opLat=2 229 230[system.cpu.fuPool.FUList3] 231type=FUDesc 232children=opList0 opList1 opList2 233count=2 234opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 235 236[system.cpu.fuPool.FUList3.opList0] 237type=OpDesc 238issueLat=1 239opClass=FloatMult 240opLat=4 241 242[system.cpu.fuPool.FUList3.opList1] 243type=OpDesc 244issueLat=12 245opClass=FloatDiv 246opLat=12 247 248[system.cpu.fuPool.FUList3.opList2] 249type=OpDesc 250issueLat=24 251opClass=FloatSqrt 252opLat=24 253 254[system.cpu.fuPool.FUList4] 255type=FUDesc 256children=opList 257count=0 258opList=system.cpu.fuPool.FUList4.opList 259 260[system.cpu.fuPool.FUList4.opList] 261type=OpDesc 262issueLat=1 263opClass=MemRead 264opLat=1 265 266[system.cpu.fuPool.FUList5] 267type=FUDesc 268children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 269count=4 270opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 271 272[system.cpu.fuPool.FUList5.opList00] 273type=OpDesc 274issueLat=1 275opClass=SimdAdd 276opLat=1 277 278[system.cpu.fuPool.FUList5.opList01] 279type=OpDesc 280issueLat=1 281opClass=SimdAddAcc 282opLat=1 283 284[system.cpu.fuPool.FUList5.opList02] 285type=OpDesc 286issueLat=1 287opClass=SimdAlu 288opLat=1 289 290[system.cpu.fuPool.FUList5.opList03] 291type=OpDesc 292issueLat=1 293opClass=SimdCmp 294opLat=1 295 296[system.cpu.fuPool.FUList5.opList04] 297type=OpDesc 298issueLat=1 299opClass=SimdCvt 300opLat=1 301 302[system.cpu.fuPool.FUList5.opList05] 303type=OpDesc 304issueLat=1 305opClass=SimdMisc 306opLat=1 307 308[system.cpu.fuPool.FUList5.opList06] 309type=OpDesc 310issueLat=1 311opClass=SimdMult 312opLat=1 313 314[system.cpu.fuPool.FUList5.opList07] 315type=OpDesc 316issueLat=1 317opClass=SimdMultAcc 318opLat=1 319 320[system.cpu.fuPool.FUList5.opList08] 321type=OpDesc 322issueLat=1 323opClass=SimdShift 324opLat=1 325 326[system.cpu.fuPool.FUList5.opList09] 327type=OpDesc 328issueLat=1 329opClass=SimdShiftAcc 330opLat=1 331 332[system.cpu.fuPool.FUList5.opList10] 333type=OpDesc 334issueLat=1 335opClass=SimdSqrt 336opLat=1 337 338[system.cpu.fuPool.FUList5.opList11] 339type=OpDesc 340issueLat=1 341opClass=SimdFloatAdd 342opLat=1 343 344[system.cpu.fuPool.FUList5.opList12] 345type=OpDesc 346issueLat=1 347opClass=SimdFloatAlu 348opLat=1 349 350[system.cpu.fuPool.FUList5.opList13] 351type=OpDesc 352issueLat=1 353opClass=SimdFloatCmp 354opLat=1 355 356[system.cpu.fuPool.FUList5.opList14] 357type=OpDesc 358issueLat=1 359opClass=SimdFloatCvt 360opLat=1 361 362[system.cpu.fuPool.FUList5.opList15] 363type=OpDesc 364issueLat=1 365opClass=SimdFloatDiv 366opLat=1 367 368[system.cpu.fuPool.FUList5.opList16] 369type=OpDesc 370issueLat=1 371opClass=SimdFloatMisc 372opLat=1 373 374[system.cpu.fuPool.FUList5.opList17] 375type=OpDesc 376issueLat=1 377opClass=SimdFloatMult 378opLat=1 379 380[system.cpu.fuPool.FUList5.opList18] 381type=OpDesc 382issueLat=1 383opClass=SimdFloatMultAcc 384opLat=1 385 386[system.cpu.fuPool.FUList5.opList19] 387type=OpDesc 388issueLat=1 389opClass=SimdFloatSqrt 390opLat=1 391 392[system.cpu.fuPool.FUList6] 393type=FUDesc 394children=opList 395count=0 396opList=system.cpu.fuPool.FUList6.opList 397 398[system.cpu.fuPool.FUList6.opList] 399type=OpDesc 400issueLat=1 401opClass=MemWrite 402opLat=1 403 404[system.cpu.fuPool.FUList7] 405type=FUDesc 406children=opList0 opList1 407count=4 408opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 409 410[system.cpu.fuPool.FUList7.opList0] 411type=OpDesc 412issueLat=1 413opClass=MemRead 414opLat=1 415 416[system.cpu.fuPool.FUList7.opList1] 417type=OpDesc 418issueLat=1 419opClass=MemWrite 420opLat=1 421 422[system.cpu.fuPool.FUList8] 423type=FUDesc 424children=opList 425count=1 426opList=system.cpu.fuPool.FUList8.opList 427 428[system.cpu.fuPool.FUList8.opList] 429type=OpDesc 430issueLat=3 431opClass=IprAccess 432opLat=3 433 434[system.cpu.icache] 435type=BaseCache 436addr_range=0:18446744073709551615 437assoc=2 438block_size=64 439forward_snoops=true 440hash_delay=1 441is_top_level=true 442latency=1000 443max_miss_count=0 444mshrs=10 445num_cpus=1 446prefetch_data_accesses_only=false 447prefetch_degree=1 448prefetch_latency=10000 449prefetch_on_access=false 450prefetch_past_page=false 451prefetch_policy=none 452prefetch_serial_squash=false 453prefetch_use_cpu_id=true 454prefetcher_size=100 455prioritizeRequests=false 456repl=Null 457size=131072 458subblock_size=0 459tgts_per_mshr=20 460trace_addr=0 461two_queue=false 462write_buffers=8 463cpu_side=system.cpu.icache_port 464mem_side=system.cpu.toL2Bus.port[0] 465 466[system.cpu.interrupts] 467type=X86LocalApic 468int_latency=1000 469pio_addr=2305843009213693952 470pio_latency=1000 471system=system 472int_port=system.membus.port[4] 473pio=system.membus.port[3] 474 475[system.cpu.itb] 476type=X86TLB 477children=walker 478size=64 479walker=system.cpu.itb.walker 480 481[system.cpu.itb.walker] 482type=X86PagetableWalker 483system=system 484port=system.cpu.toL2Bus.port[2] 485 486[system.cpu.l2cache] 487type=BaseCache 488addr_range=0:18446744073709551615 489assoc=2 490block_size=64 491forward_snoops=true 492hash_delay=1 493is_top_level=false 494latency=1000 495max_miss_count=0 496mshrs=10 497num_cpus=1 498prefetch_data_accesses_only=false 499prefetch_degree=1 500prefetch_latency=10000 501prefetch_on_access=false 502prefetch_past_page=false 503prefetch_policy=none 504prefetch_serial_squash=false 505prefetch_use_cpu_id=true 506prefetcher_size=100 507prioritizeRequests=false 508repl=Null 509size=2097152 510subblock_size=0 511tgts_per_mshr=5 512trace_addr=0 513two_queue=false 514write_buffers=8 515cpu_side=system.cpu.toL2Bus.port[4] 516mem_side=system.membus.port[2] 517 518[system.cpu.toL2Bus] 519type=Bus 520block_size=64 521bus_id=0 522clock=1000 523header_cycles=1 524use_default_range=false 525width=64 526port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side 527 528[system.cpu.tracer] 529type=ExeTracer 530 531[system.cpu.workload] 532type=LiveProcess 533cmd=parser 2.1.dict -batch 534cwd=build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing 535egid=100 536env= 537errout=cerr 538euid=100 539executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/parser 540gid=100 541input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in 542max_stack_size=67108864 543output=cout 544pid=100 545ppid=99 546simpoint=114600000000 547system=system 548uid=100 549 550[system.membus] 551type=Bus 552block_size=64 553bus_id=0 554clock=1000 555header_cycles=1 556use_default_range=false 557width=64 558port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side system.cpu.interrupts.pio system.cpu.interrupts.int_port 559 560[system.physmem] 561type=PhysicalMemory 562file= 563latency=30000 564latency_var=0 565null=false 566range=0:134217727 567zero=false 568port=system.membus.port[1] 569 570