config.ini revision 9481:b0fa6b872f40
1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13clock=1000 14init_param=0 15kernel= 16load_addr_mask=1099511627775 17mem_mode=timing 18mem_ranges= 19memories=system.physmem 20num_work_ids=16 21readfile= 22symbolfile= 23work_begin_ckpt_count=0 24work_begin_cpu_id_exit=-1 25work_begin_exit_count=0 26work_cpus_ckpt_count=0 27work_end_ckpt_count=0 28work_end_exit_count=0 29work_item_id=-1 30system_port=system.membus.slave[0] 31 32[system.cpu] 33type=DerivO3CPU 34children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload 35LFSTSize=1024 36LQEntries=32 37LSQCheckLoads=true 38LSQDepCheckShift=4 39SQEntries=32 40SSITSize=1024 41activity=0 42backComSize=5 43branchPred=system.cpu.branchPred 44cachePorts=200 45checker=Null 46clock=500 47commitToDecodeDelay=1 48commitToFetchDelay=1 49commitToIEWDelay=1 50commitToRenameDelay=1 51commitWidth=8 52cpu_id=0 53decodeToFetchDelay=1 54decodeToRenameDelay=1 55decodeWidth=8 56dispatchWidth=8 57do_checkpoint_insts=true 58do_quiesce=true 59do_statistics_insts=true 60dtb=system.cpu.dtb 61fetchToDecodeDelay=1 62fetchTrapLatency=1 63fetchWidth=8 64forwardComSize=5 65fuPool=system.cpu.fuPool 66function_trace=false 67function_trace_start=0 68iewToCommitDelay=1 69iewToDecodeDelay=1 70iewToFetchDelay=1 71iewToRenameDelay=1 72interrupts=system.cpu.interrupts 73isa=system.cpu.isa 74issueToExecuteDelay=1 75issueWidth=8 76itb=system.cpu.itb 77max_insts_all_threads=0 78max_insts_any_thread=0 79max_loads_all_threads=0 80max_loads_any_thread=0 81needsTSO=true 82numIQEntries=64 83numPhysFloatRegs=256 84numPhysIntRegs=256 85numROBEntries=192 86numRobs=1 87numThreads=1 88profile=0 89progress_interval=0 90renameToDecodeDelay=1 91renameToFetchDelay=1 92renameToIEWDelay=2 93renameToROBDelay=1 94renameWidth=8 95smtCommitPolicy=RoundRobin 96smtFetchPolicy=SingleThread 97smtIQPolicy=Partitioned 98smtIQThreshold=100 99smtLSQPolicy=Partitioned 100smtLSQThreshold=100 101smtNumFetchingThreads=1 102smtROBPolicy=Partitioned 103smtROBThreshold=100 104squashWidth=8 105store_set_clear_period=250000 106switched_out=false 107system=system 108tracer=system.cpu.tracer 109trapLatency=13 110wbDepth=1 111wbWidth=8 112workload=system.cpu.workload 113dcache_port=system.cpu.dcache.cpu_side 114icache_port=system.cpu.icache.cpu_side 115 116[system.cpu.branchPred] 117type=BranchPredictor 118BTBEntries=4096 119BTBTagSize=16 120RASSize=16 121choiceCtrBits=2 122choicePredictorSize=8192 123globalCtrBits=2 124globalHistoryBits=13 125globalPredictorSize=8192 126instShiftAmt=2 127localCtrBits=2 128localHistoryBits=11 129localHistoryTableSize=2048 130localPredictorSize=2048 131numThreads=1 132predType=tournament 133 134[system.cpu.dcache] 135type=BaseCache 136addr_ranges=0:18446744073709551615 137assoc=2 138block_size=64 139clock=500 140forward_snoops=true 141hit_latency=2 142is_top_level=true 143max_miss_count=0 144mshrs=4 145prefetch_on_access=false 146prefetcher=Null 147response_latency=2 148size=262144 149system=system 150tgts_per_mshr=20 151two_queue=false 152write_buffers=8 153cpu_side=system.cpu.dcache_port 154mem_side=system.cpu.toL2Bus.slave[1] 155 156[system.cpu.dtb] 157type=X86TLB 158children=walker 159size=64 160walker=system.cpu.dtb.walker 161 162[system.cpu.dtb.walker] 163type=X86PagetableWalker 164clock=500 165system=system 166port=system.cpu.toL2Bus.slave[3] 167 168[system.cpu.fuPool] 169type=FUPool 170children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 171FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 172 173[system.cpu.fuPool.FUList0] 174type=FUDesc 175children=opList 176count=6 177opList=system.cpu.fuPool.FUList0.opList 178 179[system.cpu.fuPool.FUList0.opList] 180type=OpDesc 181issueLat=1 182opClass=IntAlu 183opLat=1 184 185[system.cpu.fuPool.FUList1] 186type=FUDesc 187children=opList0 opList1 188count=2 189opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 190 191[system.cpu.fuPool.FUList1.opList0] 192type=OpDesc 193issueLat=1 194opClass=IntMult 195opLat=3 196 197[system.cpu.fuPool.FUList1.opList1] 198type=OpDesc 199issueLat=19 200opClass=IntDiv 201opLat=20 202 203[system.cpu.fuPool.FUList2] 204type=FUDesc 205children=opList0 opList1 opList2 206count=4 207opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 208 209[system.cpu.fuPool.FUList2.opList0] 210type=OpDesc 211issueLat=1 212opClass=FloatAdd 213opLat=2 214 215[system.cpu.fuPool.FUList2.opList1] 216type=OpDesc 217issueLat=1 218opClass=FloatCmp 219opLat=2 220 221[system.cpu.fuPool.FUList2.opList2] 222type=OpDesc 223issueLat=1 224opClass=FloatCvt 225opLat=2 226 227[system.cpu.fuPool.FUList3] 228type=FUDesc 229children=opList0 opList1 opList2 230count=2 231opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 232 233[system.cpu.fuPool.FUList3.opList0] 234type=OpDesc 235issueLat=1 236opClass=FloatMult 237opLat=4 238 239[system.cpu.fuPool.FUList3.opList1] 240type=OpDesc 241issueLat=12 242opClass=FloatDiv 243opLat=12 244 245[system.cpu.fuPool.FUList3.opList2] 246type=OpDesc 247issueLat=24 248opClass=FloatSqrt 249opLat=24 250 251[system.cpu.fuPool.FUList4] 252type=FUDesc 253children=opList 254count=0 255opList=system.cpu.fuPool.FUList4.opList 256 257[system.cpu.fuPool.FUList4.opList] 258type=OpDesc 259issueLat=1 260opClass=MemRead 261opLat=1 262 263[system.cpu.fuPool.FUList5] 264type=FUDesc 265children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 266count=4 267opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 268 269[system.cpu.fuPool.FUList5.opList00] 270type=OpDesc 271issueLat=1 272opClass=SimdAdd 273opLat=1 274 275[system.cpu.fuPool.FUList5.opList01] 276type=OpDesc 277issueLat=1 278opClass=SimdAddAcc 279opLat=1 280 281[system.cpu.fuPool.FUList5.opList02] 282type=OpDesc 283issueLat=1 284opClass=SimdAlu 285opLat=1 286 287[system.cpu.fuPool.FUList5.opList03] 288type=OpDesc 289issueLat=1 290opClass=SimdCmp 291opLat=1 292 293[system.cpu.fuPool.FUList5.opList04] 294type=OpDesc 295issueLat=1 296opClass=SimdCvt 297opLat=1 298 299[system.cpu.fuPool.FUList5.opList05] 300type=OpDesc 301issueLat=1 302opClass=SimdMisc 303opLat=1 304 305[system.cpu.fuPool.FUList5.opList06] 306type=OpDesc 307issueLat=1 308opClass=SimdMult 309opLat=1 310 311[system.cpu.fuPool.FUList5.opList07] 312type=OpDesc 313issueLat=1 314opClass=SimdMultAcc 315opLat=1 316 317[system.cpu.fuPool.FUList5.opList08] 318type=OpDesc 319issueLat=1 320opClass=SimdShift 321opLat=1 322 323[system.cpu.fuPool.FUList5.opList09] 324type=OpDesc 325issueLat=1 326opClass=SimdShiftAcc 327opLat=1 328 329[system.cpu.fuPool.FUList5.opList10] 330type=OpDesc 331issueLat=1 332opClass=SimdSqrt 333opLat=1 334 335[system.cpu.fuPool.FUList5.opList11] 336type=OpDesc 337issueLat=1 338opClass=SimdFloatAdd 339opLat=1 340 341[system.cpu.fuPool.FUList5.opList12] 342type=OpDesc 343issueLat=1 344opClass=SimdFloatAlu 345opLat=1 346 347[system.cpu.fuPool.FUList5.opList13] 348type=OpDesc 349issueLat=1 350opClass=SimdFloatCmp 351opLat=1 352 353[system.cpu.fuPool.FUList5.opList14] 354type=OpDesc 355issueLat=1 356opClass=SimdFloatCvt 357opLat=1 358 359[system.cpu.fuPool.FUList5.opList15] 360type=OpDesc 361issueLat=1 362opClass=SimdFloatDiv 363opLat=1 364 365[system.cpu.fuPool.FUList5.opList16] 366type=OpDesc 367issueLat=1 368opClass=SimdFloatMisc 369opLat=1 370 371[system.cpu.fuPool.FUList5.opList17] 372type=OpDesc 373issueLat=1 374opClass=SimdFloatMult 375opLat=1 376 377[system.cpu.fuPool.FUList5.opList18] 378type=OpDesc 379issueLat=1 380opClass=SimdFloatMultAcc 381opLat=1 382 383[system.cpu.fuPool.FUList5.opList19] 384type=OpDesc 385issueLat=1 386opClass=SimdFloatSqrt 387opLat=1 388 389[system.cpu.fuPool.FUList6] 390type=FUDesc 391children=opList 392count=0 393opList=system.cpu.fuPool.FUList6.opList 394 395[system.cpu.fuPool.FUList6.opList] 396type=OpDesc 397issueLat=1 398opClass=MemWrite 399opLat=1 400 401[system.cpu.fuPool.FUList7] 402type=FUDesc 403children=opList0 opList1 404count=4 405opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 406 407[system.cpu.fuPool.FUList7.opList0] 408type=OpDesc 409issueLat=1 410opClass=MemRead 411opLat=1 412 413[system.cpu.fuPool.FUList7.opList1] 414type=OpDesc 415issueLat=1 416opClass=MemWrite 417opLat=1 418 419[system.cpu.fuPool.FUList8] 420type=FUDesc 421children=opList 422count=1 423opList=system.cpu.fuPool.FUList8.opList 424 425[system.cpu.fuPool.FUList8.opList] 426type=OpDesc 427issueLat=3 428opClass=IprAccess 429opLat=3 430 431[system.cpu.icache] 432type=BaseCache 433addr_ranges=0:18446744073709551615 434assoc=2 435block_size=64 436clock=500 437forward_snoops=true 438hit_latency=2 439is_top_level=true 440max_miss_count=0 441mshrs=4 442prefetch_on_access=false 443prefetcher=Null 444response_latency=2 445size=131072 446system=system 447tgts_per_mshr=20 448two_queue=false 449write_buffers=8 450cpu_side=system.cpu.icache_port 451mem_side=system.cpu.toL2Bus.slave[0] 452 453[system.cpu.interrupts] 454type=X86LocalApic 455clock=500 456int_latency=1000 457pio_addr=2305843009213693952 458pio_latency=100000 459system=system 460int_master=system.membus.slave[2] 461int_slave=system.membus.master[2] 462pio=system.membus.master[1] 463 464[system.cpu.isa] 465type=X86ISA 466 467[system.cpu.itb] 468type=X86TLB 469children=walker 470size=64 471walker=system.cpu.itb.walker 472 473[system.cpu.itb.walker] 474type=X86PagetableWalker 475clock=500 476system=system 477port=system.cpu.toL2Bus.slave[2] 478 479[system.cpu.l2cache] 480type=BaseCache 481addr_ranges=0:18446744073709551615 482assoc=8 483block_size=64 484clock=500 485forward_snoops=true 486hit_latency=20 487is_top_level=false 488max_miss_count=0 489mshrs=20 490prefetch_on_access=false 491prefetcher=Null 492response_latency=20 493size=2097152 494system=system 495tgts_per_mshr=12 496two_queue=false 497write_buffers=8 498cpu_side=system.cpu.toL2Bus.master[0] 499mem_side=system.membus.slave[1] 500 501[system.cpu.toL2Bus] 502type=CoherentBus 503block_size=64 504clock=500 505header_cycles=1 506use_default_range=false 507width=32 508master=system.cpu.l2cache.cpu_side 509slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 510 511[system.cpu.tracer] 512type=ExeTracer 513 514[system.cpu.workload] 515type=LiveProcess 516cmd=mcf mcf.in 517cwd=build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing 518egid=100 519env= 520errout=cerr 521euid=100 522executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/mcf 523gid=100 524input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in 525max_stack_size=67108864 526output=cout 527pid=100 528ppid=99 529simpoint=55300000000 530system=system 531uid=100 532 533[system.membus] 534type=CoherentBus 535block_size=64 536clock=1000 537header_cycles=1 538use_default_range=false 539width=8 540master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave 541slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master 542 543[system.physmem] 544type=SimpleDRAM 545addr_mapping=openmap 546banks_per_rank=8 547clock=1000 548conf_table_reported=false 549in_addr_map=true 550lines_per_rowbuffer=64 551mem_sched_policy=fcfs 552null=false 553page_policy=open 554range=0:268435455 555ranks_per_channel=2 556read_buffer_size=32 557tBURST=4000 558tCL=14000 559tRCD=14000 560tREFI=7800000 561tRFC=300000 562tRP=14000 563tWTR=1000 564write_buffer_size=32 565write_thresh_perc=70 566zero=false 567port=system.membus.master[0] 568 569