config.ini revision 9265:8fe936e937bd
1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13clock=1 14init_param=0 15kernel= 16load_addr_mask=1099511627775 17mem_mode=atomic 18memories=system.physmem 19num_work_ids=16 20readfile= 21symbolfile= 22work_begin_ckpt_count=0 23work_begin_cpu_id_exit=-1 24work_begin_exit_count=0 25work_cpus_ckpt_count=0 26work_end_ckpt_count=0 27work_end_exit_count=0 28work_item_id=-1 29system_port=system.membus.slave[0] 30 31[system.cpu] 32type=DerivO3CPU 33children=dcache dtb fuPool icache interrupts itb l2cache toL2Bus tracer workload 34BTBEntries=4096 35BTBTagSize=16 36LFSTSize=1024 37LQEntries=32 38LSQCheckLoads=true 39LSQDepCheckShift=4 40RASSize=16 41SQEntries=32 42SSITSize=1024 43activity=0 44backComSize=5 45cachePorts=200 46checker=Null 47choiceCtrBits=2 48choicePredictorSize=8192 49clock=500 50commitToDecodeDelay=1 51commitToFetchDelay=1 52commitToIEWDelay=1 53commitToRenameDelay=1 54commitWidth=8 55cpu_id=0 56decodeToFetchDelay=1 57decodeToRenameDelay=1 58decodeWidth=8 59defer_registration=false 60dispatchWidth=8 61do_checkpoint_insts=true 62do_quiesce=true 63do_statistics_insts=true 64dtb=system.cpu.dtb 65fetchToDecodeDelay=1 66fetchTrapLatency=1 67fetchWidth=8 68forwardComSize=5 69fuPool=system.cpu.fuPool 70function_trace=false 71function_trace_start=0 72globalCtrBits=2 73globalHistoryBits=13 74globalPredictorSize=8192 75iewToCommitDelay=1 76iewToDecodeDelay=1 77iewToFetchDelay=1 78iewToRenameDelay=1 79instShiftAmt=2 80interrupts=system.cpu.interrupts 81issueToExecuteDelay=1 82issueWidth=8 83itb=system.cpu.itb 84localCtrBits=2 85localHistoryBits=11 86localHistoryTableSize=2048 87localPredictorSize=2048 88max_insts_all_threads=0 89max_insts_any_thread=0 90max_loads_all_threads=0 91max_loads_any_thread=0 92needsTSO=false 93numIQEntries=64 94numPhysFloatRegs=256 95numPhysIntRegs=256 96numROBEntries=192 97numRobs=1 98numThreads=1 99predType=tournament 100profile=0 101progress_interval=0 102renameToDecodeDelay=1 103renameToFetchDelay=1 104renameToIEWDelay=2 105renameToROBDelay=1 106renameWidth=8 107smtCommitPolicy=RoundRobin 108smtFetchPolicy=SingleThread 109smtIQPolicy=Partitioned 110smtIQThreshold=100 111smtLSQPolicy=Partitioned 112smtLSQThreshold=100 113smtNumFetchingThreads=1 114smtROBPolicy=Partitioned 115smtROBThreshold=100 116squashWidth=8 117store_set_clear_period=250000 118system=system 119tracer=system.cpu.tracer 120trapLatency=13 121wbDepth=1 122wbWidth=8 123workload=system.cpu.workload 124dcache_port=system.cpu.dcache.cpu_side 125icache_port=system.cpu.icache.cpu_side 126 127[system.cpu.dcache] 128type=BaseCache 129addr_ranges=0:18446744073709551615 130assoc=2 131block_size=64 132clock=1 133forward_snoops=true 134hash_delay=1 135hit_latency=1000 136is_top_level=true 137max_miss_count=0 138mshrs=10 139prefetch_on_access=false 140prefetcher=Null 141prioritizeRequests=false 142repl=Null 143response_latency=1000 144size=262144 145subblock_size=0 146system=system 147tgts_per_mshr=20 148trace_addr=0 149two_queue=false 150write_buffers=8 151cpu_side=system.cpu.dcache_port 152mem_side=system.cpu.toL2Bus.slave[1] 153 154[system.cpu.dtb] 155type=ArmTLB 156children=walker 157size=64 158walker=system.cpu.dtb.walker 159 160[system.cpu.dtb.walker] 161type=ArmTableWalker 162clock=1 163num_squash_per_cycle=2 164sys=system 165port=system.cpu.toL2Bus.slave[3] 166 167[system.cpu.fuPool] 168type=FUPool 169children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 170FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 171 172[system.cpu.fuPool.FUList0] 173type=FUDesc 174children=opList 175count=6 176opList=system.cpu.fuPool.FUList0.opList 177 178[system.cpu.fuPool.FUList0.opList] 179type=OpDesc 180issueLat=1 181opClass=IntAlu 182opLat=1 183 184[system.cpu.fuPool.FUList1] 185type=FUDesc 186children=opList0 opList1 187count=2 188opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 189 190[system.cpu.fuPool.FUList1.opList0] 191type=OpDesc 192issueLat=1 193opClass=IntMult 194opLat=3 195 196[system.cpu.fuPool.FUList1.opList1] 197type=OpDesc 198issueLat=19 199opClass=IntDiv 200opLat=20 201 202[system.cpu.fuPool.FUList2] 203type=FUDesc 204children=opList0 opList1 opList2 205count=4 206opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 207 208[system.cpu.fuPool.FUList2.opList0] 209type=OpDesc 210issueLat=1 211opClass=FloatAdd 212opLat=2 213 214[system.cpu.fuPool.FUList2.opList1] 215type=OpDesc 216issueLat=1 217opClass=FloatCmp 218opLat=2 219 220[system.cpu.fuPool.FUList2.opList2] 221type=OpDesc 222issueLat=1 223opClass=FloatCvt 224opLat=2 225 226[system.cpu.fuPool.FUList3] 227type=FUDesc 228children=opList0 opList1 opList2 229count=2 230opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 231 232[system.cpu.fuPool.FUList3.opList0] 233type=OpDesc 234issueLat=1 235opClass=FloatMult 236opLat=4 237 238[system.cpu.fuPool.FUList3.opList1] 239type=OpDesc 240issueLat=12 241opClass=FloatDiv 242opLat=12 243 244[system.cpu.fuPool.FUList3.opList2] 245type=OpDesc 246issueLat=24 247opClass=FloatSqrt 248opLat=24 249 250[system.cpu.fuPool.FUList4] 251type=FUDesc 252children=opList 253count=0 254opList=system.cpu.fuPool.FUList4.opList 255 256[system.cpu.fuPool.FUList4.opList] 257type=OpDesc 258issueLat=1 259opClass=MemRead 260opLat=1 261 262[system.cpu.fuPool.FUList5] 263type=FUDesc 264children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 265count=4 266opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 267 268[system.cpu.fuPool.FUList5.opList00] 269type=OpDesc 270issueLat=1 271opClass=SimdAdd 272opLat=1 273 274[system.cpu.fuPool.FUList5.opList01] 275type=OpDesc 276issueLat=1 277opClass=SimdAddAcc 278opLat=1 279 280[system.cpu.fuPool.FUList5.opList02] 281type=OpDesc 282issueLat=1 283opClass=SimdAlu 284opLat=1 285 286[system.cpu.fuPool.FUList5.opList03] 287type=OpDesc 288issueLat=1 289opClass=SimdCmp 290opLat=1 291 292[system.cpu.fuPool.FUList5.opList04] 293type=OpDesc 294issueLat=1 295opClass=SimdCvt 296opLat=1 297 298[system.cpu.fuPool.FUList5.opList05] 299type=OpDesc 300issueLat=1 301opClass=SimdMisc 302opLat=1 303 304[system.cpu.fuPool.FUList5.opList06] 305type=OpDesc 306issueLat=1 307opClass=SimdMult 308opLat=1 309 310[system.cpu.fuPool.FUList5.opList07] 311type=OpDesc 312issueLat=1 313opClass=SimdMultAcc 314opLat=1 315 316[system.cpu.fuPool.FUList5.opList08] 317type=OpDesc 318issueLat=1 319opClass=SimdShift 320opLat=1 321 322[system.cpu.fuPool.FUList5.opList09] 323type=OpDesc 324issueLat=1 325opClass=SimdShiftAcc 326opLat=1 327 328[system.cpu.fuPool.FUList5.opList10] 329type=OpDesc 330issueLat=1 331opClass=SimdSqrt 332opLat=1 333 334[system.cpu.fuPool.FUList5.opList11] 335type=OpDesc 336issueLat=1 337opClass=SimdFloatAdd 338opLat=1 339 340[system.cpu.fuPool.FUList5.opList12] 341type=OpDesc 342issueLat=1 343opClass=SimdFloatAlu 344opLat=1 345 346[system.cpu.fuPool.FUList5.opList13] 347type=OpDesc 348issueLat=1 349opClass=SimdFloatCmp 350opLat=1 351 352[system.cpu.fuPool.FUList5.opList14] 353type=OpDesc 354issueLat=1 355opClass=SimdFloatCvt 356opLat=1 357 358[system.cpu.fuPool.FUList5.opList15] 359type=OpDesc 360issueLat=1 361opClass=SimdFloatDiv 362opLat=1 363 364[system.cpu.fuPool.FUList5.opList16] 365type=OpDesc 366issueLat=1 367opClass=SimdFloatMisc 368opLat=1 369 370[system.cpu.fuPool.FUList5.opList17] 371type=OpDesc 372issueLat=1 373opClass=SimdFloatMult 374opLat=1 375 376[system.cpu.fuPool.FUList5.opList18] 377type=OpDesc 378issueLat=1 379opClass=SimdFloatMultAcc 380opLat=1 381 382[system.cpu.fuPool.FUList5.opList19] 383type=OpDesc 384issueLat=1 385opClass=SimdFloatSqrt 386opLat=1 387 388[system.cpu.fuPool.FUList6] 389type=FUDesc 390children=opList 391count=0 392opList=system.cpu.fuPool.FUList6.opList 393 394[system.cpu.fuPool.FUList6.opList] 395type=OpDesc 396issueLat=1 397opClass=MemWrite 398opLat=1 399 400[system.cpu.fuPool.FUList7] 401type=FUDesc 402children=opList0 opList1 403count=4 404opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 405 406[system.cpu.fuPool.FUList7.opList0] 407type=OpDesc 408issueLat=1 409opClass=MemRead 410opLat=1 411 412[system.cpu.fuPool.FUList7.opList1] 413type=OpDesc 414issueLat=1 415opClass=MemWrite 416opLat=1 417 418[system.cpu.fuPool.FUList8] 419type=FUDesc 420children=opList 421count=1 422opList=system.cpu.fuPool.FUList8.opList 423 424[system.cpu.fuPool.FUList8.opList] 425type=OpDesc 426issueLat=3 427opClass=IprAccess 428opLat=3 429 430[system.cpu.icache] 431type=BaseCache 432addr_ranges=0:18446744073709551615 433assoc=2 434block_size=64 435clock=1 436forward_snoops=true 437hash_delay=1 438hit_latency=1000 439is_top_level=true 440max_miss_count=0 441mshrs=10 442prefetch_on_access=false 443prefetcher=Null 444prioritizeRequests=false 445repl=Null 446response_latency=1000 447size=131072 448subblock_size=0 449system=system 450tgts_per_mshr=20 451trace_addr=0 452two_queue=false 453write_buffers=8 454cpu_side=system.cpu.icache_port 455mem_side=system.cpu.toL2Bus.slave[0] 456 457[system.cpu.interrupts] 458type=ArmInterrupts 459 460[system.cpu.itb] 461type=ArmTLB 462children=walker 463size=64 464walker=system.cpu.itb.walker 465 466[system.cpu.itb.walker] 467type=ArmTableWalker 468clock=1 469num_squash_per_cycle=2 470sys=system 471port=system.cpu.toL2Bus.slave[2] 472 473[system.cpu.l2cache] 474type=BaseCache 475addr_ranges=0:18446744073709551615 476assoc=2 477block_size=64 478clock=1 479forward_snoops=true 480hash_delay=1 481hit_latency=1000 482is_top_level=false 483max_miss_count=0 484mshrs=10 485prefetch_on_access=false 486prefetcher=Null 487prioritizeRequests=false 488repl=Null 489response_latency=1000 490size=2097152 491subblock_size=0 492system=system 493tgts_per_mshr=5 494trace_addr=0 495two_queue=false 496write_buffers=8 497cpu_side=system.cpu.toL2Bus.master[0] 498mem_side=system.membus.slave[1] 499 500[system.cpu.toL2Bus] 501type=CoherentBus 502block_size=64 503clock=1000 504header_cycles=1 505use_default_range=false 506width=8 507master=system.cpu.l2cache.cpu_side 508slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 509 510[system.cpu.tracer] 511type=ExeTracer 512 513[system.cpu.workload] 514type=LiveProcess 515cmd=mcf mcf.in 516cwd=build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing 517egid=100 518env= 519errout=cerr 520euid=100 521executable=/projects/pd/randd/dist/cpu2000/binaries/arm/linux/mcf 522gid=100 523input=/projects/pd/randd/dist/cpu2000/data/mcf/smred/input/mcf.in 524max_stack_size=67108864 525output=cout 526pid=100 527ppid=99 528simpoint=55300000000 529system=system 530uid=100 531 532[system.membus] 533type=CoherentBus 534block_size=64 535clock=1000 536header_cycles=1 537use_default_range=false 538width=8 539master=system.physmem.port 540slave=system.system_port system.cpu.l2cache.mem_side 541 542[system.physmem] 543type=SimpleMemory 544bandwidth=73.000000 545clock=1 546conf_table_reported=false 547in_addr_map=true 548latency=30000 549latency_var=0 550null=false 551range=0:268435455 552zero=false 553port=system.membus.master[0] 554 555