config.ini revision 9348:44d31345e360
1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxArmSystem 11children=bridge cf0 cpu intrctrl iobus iocache membus physmem realview terminal vncserver 12atags_addr=256 13boot_loader=/projects/pd/randd/dist/binaries/boot.arm 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 15clock=1000 16dtb_filename= 17early_kernel_symbols=false 18enable_context_switch_stats_dump=false 19flags_addr=268435504 20gic_cpu_addr=520093952 21init_param=0 22kernel=/projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 23load_addr_mask=268435455 24machine_type=RealView_PBX 25mem_mode=timing 26memories=system.physmem system.realview.nvmem 27multi_proc=true 28num_work_ids=16 29readfile=tests/halt.sh 30symbolfile= 31work_begin_ckpt_count=0 32work_begin_cpu_id_exit=-1 33work_begin_exit_count=0 34work_cpus_ckpt_count=0 35work_end_ckpt_count=0 36work_end_exit_count=0 37work_item_id=-1 38system_port=system.membus.slave[0] 39 40[system.bridge] 41type=Bridge 42clock=1000 43delay=50000 44ranges=268435456:520093695 1073741824:1610612735 45req_size=16 46resp_size=16 47master=system.iobus.slave[0] 48slave=system.membus.master[0] 49 50[system.cf0] 51type=IdeDisk 52children=image 53delay=1000000 54driveID=master 55image=system.cf0.image 56 57[system.cf0.image] 58type=CowDiskImage 59children=child 60child=system.cf0.image.child 61image_file= 62read_only=false 63table_size=65536 64 65[system.cf0.image.child] 66type=RawDiskImage 67image_file=/projects/pd/randd/dist/disks/linux-arm-ael.img 68read_only=true 69 70[system.cpu] 71type=DerivO3CPU 72children=dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer 73BTBEntries=4096 74BTBTagSize=16 75LFSTSize=1024 76LQEntries=32 77LSQCheckLoads=true 78LSQDepCheckShift=4 79RASSize=16 80SQEntries=32 81SSITSize=1024 82activity=0 83backComSize=5 84cachePorts=200 85checker=Null 86choiceCtrBits=2 87choicePredictorSize=8192 88clock=500 89commitToDecodeDelay=1 90commitToFetchDelay=1 91commitToIEWDelay=1 92commitToRenameDelay=1 93commitWidth=8 94cpu_id=0 95decodeToFetchDelay=1 96decodeToRenameDelay=1 97decodeWidth=8 98defer_registration=false 99dispatchWidth=8 100do_checkpoint_insts=true 101do_quiesce=true 102do_statistics_insts=true 103dtb=system.cpu.dtb 104fetchToDecodeDelay=1 105fetchTrapLatency=1 106fetchWidth=8 107forwardComSize=5 108fuPool=system.cpu.fuPool 109function_trace=false 110function_trace_start=0 111globalCtrBits=2 112globalHistoryBits=13 113globalPredictorSize=8192 114iewToCommitDelay=1 115iewToDecodeDelay=1 116iewToFetchDelay=1 117iewToRenameDelay=1 118instShiftAmt=2 119interrupts=system.cpu.interrupts 120isa=system.cpu.isa 121issueToExecuteDelay=1 122issueWidth=8 123itb=system.cpu.itb 124localCtrBits=2 125localHistoryBits=11 126localHistoryTableSize=2048 127localPredictorSize=2048 128max_insts_all_threads=0 129max_insts_any_thread=0 130max_loads_all_threads=0 131max_loads_any_thread=0 132needsTSO=false 133numIQEntries=64 134numPhysFloatRegs=256 135numPhysIntRegs=256 136numROBEntries=192 137numRobs=1 138numThreads=1 139predType=tournament 140profile=0 141progress_interval=0 142renameToDecodeDelay=1 143renameToFetchDelay=1 144renameToIEWDelay=2 145renameToROBDelay=1 146renameWidth=8 147smtCommitPolicy=RoundRobin 148smtFetchPolicy=SingleThread 149smtIQPolicy=Partitioned 150smtIQThreshold=100 151smtLSQPolicy=Partitioned 152smtLSQThreshold=100 153smtNumFetchingThreads=1 154smtROBPolicy=Partitioned 155smtROBThreshold=100 156squashWidth=8 157store_set_clear_period=250000 158system=system 159tracer=system.cpu.tracer 160trapLatency=13 161wbDepth=1 162wbWidth=8 163workload= 164dcache_port=system.cpu.dcache.cpu_side 165icache_port=system.cpu.icache.cpu_side 166 167[system.cpu.dcache] 168type=BaseCache 169addr_ranges=0:18446744073709551615 170assoc=4 171block_size=64 172clock=500 173forward_snoops=true 174hash_delay=1 175hit_latency=2 176is_top_level=true 177max_miss_count=0 178mshrs=4 179prefetch_on_access=false 180prefetcher=Null 181prioritizeRequests=false 182repl=Null 183response_latency=2 184size=32768 185subblock_size=0 186system=system 187tgts_per_mshr=20 188trace_addr=0 189two_queue=false 190write_buffers=8 191cpu_side=system.cpu.dcache_port 192mem_side=system.cpu.toL2Bus.slave[1] 193 194[system.cpu.dtb] 195type=ArmTLB 196children=walker 197size=64 198walker=system.cpu.dtb.walker 199 200[system.cpu.dtb.walker] 201type=ArmTableWalker 202clock=500 203num_squash_per_cycle=2 204sys=system 205port=system.cpu.toL2Bus.slave[3] 206 207[system.cpu.fuPool] 208type=FUPool 209children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 210FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 211 212[system.cpu.fuPool.FUList0] 213type=FUDesc 214children=opList 215count=6 216opList=system.cpu.fuPool.FUList0.opList 217 218[system.cpu.fuPool.FUList0.opList] 219type=OpDesc 220issueLat=1 221opClass=IntAlu 222opLat=1 223 224[system.cpu.fuPool.FUList1] 225type=FUDesc 226children=opList0 opList1 227count=2 228opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 229 230[system.cpu.fuPool.FUList1.opList0] 231type=OpDesc 232issueLat=1 233opClass=IntMult 234opLat=3 235 236[system.cpu.fuPool.FUList1.opList1] 237type=OpDesc 238issueLat=19 239opClass=IntDiv 240opLat=20 241 242[system.cpu.fuPool.FUList2] 243type=FUDesc 244children=opList0 opList1 opList2 245count=4 246opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 247 248[system.cpu.fuPool.FUList2.opList0] 249type=OpDesc 250issueLat=1 251opClass=FloatAdd 252opLat=2 253 254[system.cpu.fuPool.FUList2.opList1] 255type=OpDesc 256issueLat=1 257opClass=FloatCmp 258opLat=2 259 260[system.cpu.fuPool.FUList2.opList2] 261type=OpDesc 262issueLat=1 263opClass=FloatCvt 264opLat=2 265 266[system.cpu.fuPool.FUList3] 267type=FUDesc 268children=opList0 opList1 opList2 269count=2 270opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 271 272[system.cpu.fuPool.FUList3.opList0] 273type=OpDesc 274issueLat=1 275opClass=FloatMult 276opLat=4 277 278[system.cpu.fuPool.FUList3.opList1] 279type=OpDesc 280issueLat=12 281opClass=FloatDiv 282opLat=12 283 284[system.cpu.fuPool.FUList3.opList2] 285type=OpDesc 286issueLat=24 287opClass=FloatSqrt 288opLat=24 289 290[system.cpu.fuPool.FUList4] 291type=FUDesc 292children=opList 293count=0 294opList=system.cpu.fuPool.FUList4.opList 295 296[system.cpu.fuPool.FUList4.opList] 297type=OpDesc 298issueLat=1 299opClass=MemRead 300opLat=1 301 302[system.cpu.fuPool.FUList5] 303type=FUDesc 304children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 305count=4 306opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 307 308[system.cpu.fuPool.FUList5.opList00] 309type=OpDesc 310issueLat=1 311opClass=SimdAdd 312opLat=1 313 314[system.cpu.fuPool.FUList5.opList01] 315type=OpDesc 316issueLat=1 317opClass=SimdAddAcc 318opLat=1 319 320[system.cpu.fuPool.FUList5.opList02] 321type=OpDesc 322issueLat=1 323opClass=SimdAlu 324opLat=1 325 326[system.cpu.fuPool.FUList5.opList03] 327type=OpDesc 328issueLat=1 329opClass=SimdCmp 330opLat=1 331 332[system.cpu.fuPool.FUList5.opList04] 333type=OpDesc 334issueLat=1 335opClass=SimdCvt 336opLat=1 337 338[system.cpu.fuPool.FUList5.opList05] 339type=OpDesc 340issueLat=1 341opClass=SimdMisc 342opLat=1 343 344[system.cpu.fuPool.FUList5.opList06] 345type=OpDesc 346issueLat=1 347opClass=SimdMult 348opLat=1 349 350[system.cpu.fuPool.FUList5.opList07] 351type=OpDesc 352issueLat=1 353opClass=SimdMultAcc 354opLat=1 355 356[system.cpu.fuPool.FUList5.opList08] 357type=OpDesc 358issueLat=1 359opClass=SimdShift 360opLat=1 361 362[system.cpu.fuPool.FUList5.opList09] 363type=OpDesc 364issueLat=1 365opClass=SimdShiftAcc 366opLat=1 367 368[system.cpu.fuPool.FUList5.opList10] 369type=OpDesc 370issueLat=1 371opClass=SimdSqrt 372opLat=1 373 374[system.cpu.fuPool.FUList5.opList11] 375type=OpDesc 376issueLat=1 377opClass=SimdFloatAdd 378opLat=1 379 380[system.cpu.fuPool.FUList5.opList12] 381type=OpDesc 382issueLat=1 383opClass=SimdFloatAlu 384opLat=1 385 386[system.cpu.fuPool.FUList5.opList13] 387type=OpDesc 388issueLat=1 389opClass=SimdFloatCmp 390opLat=1 391 392[system.cpu.fuPool.FUList5.opList14] 393type=OpDesc 394issueLat=1 395opClass=SimdFloatCvt 396opLat=1 397 398[system.cpu.fuPool.FUList5.opList15] 399type=OpDesc 400issueLat=1 401opClass=SimdFloatDiv 402opLat=1 403 404[system.cpu.fuPool.FUList5.opList16] 405type=OpDesc 406issueLat=1 407opClass=SimdFloatMisc 408opLat=1 409 410[system.cpu.fuPool.FUList5.opList17] 411type=OpDesc 412issueLat=1 413opClass=SimdFloatMult 414opLat=1 415 416[system.cpu.fuPool.FUList5.opList18] 417type=OpDesc 418issueLat=1 419opClass=SimdFloatMultAcc 420opLat=1 421 422[system.cpu.fuPool.FUList5.opList19] 423type=OpDesc 424issueLat=1 425opClass=SimdFloatSqrt 426opLat=1 427 428[system.cpu.fuPool.FUList6] 429type=FUDesc 430children=opList 431count=0 432opList=system.cpu.fuPool.FUList6.opList 433 434[system.cpu.fuPool.FUList6.opList] 435type=OpDesc 436issueLat=1 437opClass=MemWrite 438opLat=1 439 440[system.cpu.fuPool.FUList7] 441type=FUDesc 442children=opList0 opList1 443count=4 444opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 445 446[system.cpu.fuPool.FUList7.opList0] 447type=OpDesc 448issueLat=1 449opClass=MemRead 450opLat=1 451 452[system.cpu.fuPool.FUList7.opList1] 453type=OpDesc 454issueLat=1 455opClass=MemWrite 456opLat=1 457 458[system.cpu.fuPool.FUList8] 459type=FUDesc 460children=opList 461count=1 462opList=system.cpu.fuPool.FUList8.opList 463 464[system.cpu.fuPool.FUList8.opList] 465type=OpDesc 466issueLat=3 467opClass=IprAccess 468opLat=3 469 470[system.cpu.icache] 471type=BaseCache 472addr_ranges=0:18446744073709551615 473assoc=1 474block_size=64 475clock=500 476forward_snoops=true 477hash_delay=1 478hit_latency=2 479is_top_level=true 480max_miss_count=0 481mshrs=4 482prefetch_on_access=false 483prefetcher=Null 484prioritizeRequests=false 485repl=Null 486response_latency=2 487size=32768 488subblock_size=0 489system=system 490tgts_per_mshr=20 491trace_addr=0 492two_queue=false 493write_buffers=8 494cpu_side=system.cpu.icache_port 495mem_side=system.cpu.toL2Bus.slave[0] 496 497[system.cpu.interrupts] 498type=ArmInterrupts 499 500[system.cpu.isa] 501type=ArmISA 502fpsid=1090793632 503id_isar0=34607377 504id_isar1=34677009 505id_isar2=555950401 506id_isar3=17899825 507id_isar4=268501314 508id_isar5=0 509id_mmfr0=3 510id_mmfr1=0 511id_mmfr2=19070976 512id_mmfr3=4027589137 513id_pfr0=49 514id_pfr1=1 515midr=890224640 516 517[system.cpu.itb] 518type=ArmTLB 519children=walker 520size=64 521walker=system.cpu.itb.walker 522 523[system.cpu.itb.walker] 524type=ArmTableWalker 525clock=500 526num_squash_per_cycle=2 527sys=system 528port=system.cpu.toL2Bus.slave[2] 529 530[system.cpu.l2cache] 531type=BaseCache 532addr_ranges=0:18446744073709551615 533assoc=8 534block_size=64 535clock=500 536forward_snoops=true 537hash_delay=1 538hit_latency=20 539is_top_level=false 540max_miss_count=0 541mshrs=20 542prefetch_on_access=false 543prefetcher=Null 544prioritizeRequests=false 545repl=Null 546response_latency=20 547size=4194304 548subblock_size=0 549system=system 550tgts_per_mshr=12 551trace_addr=0 552two_queue=false 553write_buffers=8 554cpu_side=system.cpu.toL2Bus.master[0] 555mem_side=system.membus.slave[2] 556 557[system.cpu.toL2Bus] 558type=CoherentBus 559block_size=64 560clock=500 561header_cycles=1 562use_default_range=false 563width=32 564master=system.cpu.l2cache.cpu_side 565slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 566 567[system.cpu.tracer] 568type=ExeTracer 569 570[system.intrctrl] 571type=IntrControl 572sys=system 573 574[system.iobus] 575type=NoncoherentBus 576block_size=64 577clock=1000 578header_cycles=1 579use_default_range=false 580width=8 581master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 582slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 583 584[system.iocache] 585type=BaseCache 586addr_ranges=0:268435455 587assoc=8 588block_size=64 589clock=1000 590forward_snoops=false 591hash_delay=1 592hit_latency=50 593is_top_level=true 594max_miss_count=0 595mshrs=20 596prefetch_on_access=false 597prefetcher=Null 598prioritizeRequests=false 599repl=Null 600response_latency=50 601size=1024 602subblock_size=0 603system=system 604tgts_per_mshr=12 605trace_addr=0 606two_queue=false 607write_buffers=8 608cpu_side=system.iobus.master[25] 609mem_side=system.membus.slave[1] 610 611[system.membus] 612type=CoherentBus 613children=badaddr_responder 614block_size=64 615clock=1000 616header_cycles=1 617use_default_range=false 618width=8 619default=system.membus.badaddr_responder.pio 620master=system.bridge.slave system.realview.nvmem.port system.physmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio 621slave=system.system_port system.iocache.mem_side system.cpu.l2cache.mem_side 622 623[system.membus.badaddr_responder] 624type=IsaFake 625clock=1000 626fake_mem=false 627pio_addr=0 628pio_latency=100000 629pio_size=8 630ret_bad_addr=true 631ret_data16=65535 632ret_data32=4294967295 633ret_data64=18446744073709551615 634ret_data8=255 635system=system 636update_data=false 637warn_access=warn 638pio=system.membus.default 639 640[system.physmem] 641type=SimpleDRAM 642addr_mapping=openmap 643banks_per_rank=8 644clock=1000 645conf_table_reported=true 646in_addr_map=true 647lines_per_rowbuffer=64 648mem_sched_policy=fcfs 649null=false 650page_policy=open 651range=0:134217727 652ranks_per_channel=2 653read_buffer_size=32 654tBURST=4000 655tCL=14000 656tRCD=14000 657tREFI=7800000 658tRFC=300000 659tRP=14000 660tWTR=1000 661write_buffer_size=32 662write_thresh_perc=70 663zero=false 664port=system.membus.master[2] 665 666[system.realview] 667type=RealView 668children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 669intrctrl=system.intrctrl 670max_mem_size=268435456 671mem_start_addr=0 672pci_cfg_base=0 673system=system 674 675[system.realview.a9scu] 676type=A9SCU 677clock=1000 678pio_addr=520093696 679pio_latency=100000 680system=system 681pio=system.membus.master[5] 682 683[system.realview.aaci_fake] 684type=AmbaFake 685amba_id=0 686clock=1000 687ignore_access=false 688pio_addr=268451840 689pio_latency=100000 690system=system 691pio=system.iobus.master[21] 692 693[system.realview.cf_ctrl] 694type=IdeController 695BAR0=402653184 696BAR0LegacyIO=true 697BAR0Size=16 698BAR1=402653440 699BAR1LegacyIO=true 700BAR1Size=1 701BAR2=1 702BAR2LegacyIO=false 703BAR2Size=8 704BAR3=1 705BAR3LegacyIO=false 706BAR3Size=4 707BAR4=1 708BAR4LegacyIO=false 709BAR4Size=16 710BAR5=1 711BAR5LegacyIO=false 712BAR5Size=0 713BIST=0 714CacheLineSize=0 715CardbusCIS=0 716ClassCode=1 717Command=1 718DeviceID=28945 719ExpansionROM=0 720HeaderType=0 721InterruptLine=31 722InterruptPin=1 723LatencyTimer=0 724MaximumLatency=0 725MinimumGrant=0 726ProgIF=133 727Revision=0 728Status=640 729SubClassCode=1 730SubsystemID=0 731SubsystemVendorID=0 732VendorID=32902 733clock=1000 734config_latency=20000 735ctrl_offset=2 736disks=system.cf0 737io_shift=1 738pci_bus=2 739pci_dev=7 740pci_func=0 741pio_latency=30000 742platform=system.realview 743system=system 744config=system.iobus.master[8] 745dma=system.iobus.slave[2] 746pio=system.iobus.master[7] 747 748[system.realview.clcd] 749type=Pl111 750amba_id=1315089 751clock=41667 752gic=system.realview.gic 753int_num=55 754pio_addr=268566528 755pio_latency=10000 756system=system 757vnc=system.vncserver 758dma=system.iobus.slave[1] 759pio=system.iobus.master[4] 760 761[system.realview.dmac_fake] 762type=AmbaFake 763amba_id=0 764clock=1000 765ignore_access=false 766pio_addr=268632064 767pio_latency=100000 768system=system 769pio=system.iobus.master[9] 770 771[system.realview.flash_fake] 772type=IsaFake 773clock=1000 774fake_mem=true 775pio_addr=1073741824 776pio_latency=100000 777pio_size=536870912 778ret_bad_addr=false 779ret_data16=65535 780ret_data32=4294967295 781ret_data64=18446744073709551615 782ret_data8=255 783system=system 784update_data=false 785warn_access= 786pio=system.iobus.master[24] 787 788[system.realview.gic] 789type=Gic 790clock=1000 791cpu_addr=520093952 792cpu_pio_delay=10000 793dist_addr=520097792 794dist_pio_delay=10000 795int_latency=10000 796it_lines=128 797platform=system.realview 798system=system 799pio=system.membus.master[3] 800 801[system.realview.gpio0_fake] 802type=AmbaFake 803amba_id=0 804clock=1000 805ignore_access=false 806pio_addr=268513280 807pio_latency=100000 808system=system 809pio=system.iobus.master[16] 810 811[system.realview.gpio1_fake] 812type=AmbaFake 813amba_id=0 814clock=1000 815ignore_access=false 816pio_addr=268517376 817pio_latency=100000 818system=system 819pio=system.iobus.master[17] 820 821[system.realview.gpio2_fake] 822type=AmbaFake 823amba_id=0 824clock=1000 825ignore_access=false 826pio_addr=268521472 827pio_latency=100000 828system=system 829pio=system.iobus.master[18] 830 831[system.realview.kmi0] 832type=Pl050 833amba_id=1314896 834clock=1000 835gic=system.realview.gic 836int_delay=1000000 837int_num=52 838is_mouse=false 839pio_addr=268460032 840pio_latency=100000 841system=system 842vnc=system.vncserver 843pio=system.iobus.master[5] 844 845[system.realview.kmi1] 846type=Pl050 847amba_id=1314896 848clock=1000 849gic=system.realview.gic 850int_delay=1000000 851int_num=53 852is_mouse=true 853pio_addr=268464128 854pio_latency=100000 855system=system 856vnc=system.vncserver 857pio=system.iobus.master[6] 858 859[system.realview.l2x0_fake] 860type=IsaFake 861clock=1000 862fake_mem=false 863pio_addr=520101888 864pio_latency=100000 865pio_size=4095 866ret_bad_addr=false 867ret_data16=65535 868ret_data32=4294967295 869ret_data64=18446744073709551615 870ret_data8=255 871system=system 872update_data=false 873warn_access= 874pio=system.membus.master[4] 875 876[system.realview.local_cpu_timer] 877type=CpuLocalTimer 878clock=1000 879gic=system.realview.gic 880int_num_timer=29 881int_num_watchdog=30 882pio_addr=520095232 883pio_latency=100000 884system=system 885pio=system.membus.master[6] 886 887[system.realview.mmc_fake] 888type=AmbaFake 889amba_id=0 890clock=1000 891ignore_access=false 892pio_addr=268455936 893pio_latency=100000 894system=system 895pio=system.iobus.master[22] 896 897[system.realview.nvmem] 898type=SimpleMemory 899bandwidth=73.000000 900clock=1000 901conf_table_reported=false 902in_addr_map=true 903latency=30000 904latency_var=0 905null=false 906range=2147483648:2214592511 907zero=true 908port=system.membus.master[1] 909 910[system.realview.realview_io] 911type=RealViewCtrl 912clock=1000 913idreg=0 914pio_addr=268435456 915pio_latency=100000 916proc_id0=201326592 917proc_id1=201327138 918system=system 919pio=system.iobus.master[1] 920 921[system.realview.rtc] 922type=PL031 923amba_id=3412017 924clock=1000 925gic=system.realview.gic 926int_delay=100000 927int_num=42 928pio_addr=268529664 929pio_latency=100000 930system=system 931time=Thu Jan 1 00:00:00 2009 932pio=system.iobus.master[23] 933 934[system.realview.sci_fake] 935type=AmbaFake 936amba_id=0 937clock=1000 938ignore_access=false 939pio_addr=268492800 940pio_latency=100000 941system=system 942pio=system.iobus.master[20] 943 944[system.realview.smc_fake] 945type=AmbaFake 946amba_id=0 947clock=1000 948ignore_access=false 949pio_addr=269357056 950pio_latency=100000 951system=system 952pio=system.iobus.master[13] 953 954[system.realview.sp810_fake] 955type=AmbaFake 956amba_id=0 957clock=1000 958ignore_access=true 959pio_addr=268439552 960pio_latency=100000 961system=system 962pio=system.iobus.master[14] 963 964[system.realview.ssp_fake] 965type=AmbaFake 966amba_id=0 967clock=1000 968ignore_access=false 969pio_addr=268488704 970pio_latency=100000 971system=system 972pio=system.iobus.master[19] 973 974[system.realview.timer0] 975type=Sp804 976amba_id=1316868 977clock=1000 978clock0=1000000 979clock1=1000000 980gic=system.realview.gic 981int_num0=36 982int_num1=36 983pio_addr=268505088 984pio_latency=100000 985system=system 986pio=system.iobus.master[2] 987 988[system.realview.timer1] 989type=Sp804 990amba_id=1316868 991clock=1000 992clock0=1000000 993clock1=1000000 994gic=system.realview.gic 995int_num0=37 996int_num1=37 997pio_addr=268509184 998pio_latency=100000 999system=system 1000pio=system.iobus.master[3] 1001 1002[system.realview.uart] 1003type=Pl011 1004clock=1000 1005end_on_eot=false 1006gic=system.realview.gic 1007int_delay=100000 1008int_num=44 1009pio_addr=268472320 1010pio_latency=100000 1011platform=system.realview 1012system=system 1013terminal=system.terminal 1014pio=system.iobus.master[0] 1015 1016[system.realview.uart1_fake] 1017type=AmbaFake 1018amba_id=0 1019clock=1000 1020ignore_access=false 1021pio_addr=268476416 1022pio_latency=100000 1023system=system 1024pio=system.iobus.master[10] 1025 1026[system.realview.uart2_fake] 1027type=AmbaFake 1028amba_id=0 1029clock=1000 1030ignore_access=false 1031pio_addr=268480512 1032pio_latency=100000 1033system=system 1034pio=system.iobus.master[11] 1035 1036[system.realview.uart3_fake] 1037type=AmbaFake 1038amba_id=0 1039clock=1000 1040ignore_access=false 1041pio_addr=268484608 1042pio_latency=100000 1043system=system 1044pio=system.iobus.master[12] 1045 1046[system.realview.watchdog_fake] 1047type=AmbaFake 1048amba_id=0 1049clock=1000 1050ignore_access=false 1051pio_addr=268500992 1052pio_latency=100000 1053system=system 1054pio=system.iobus.master[15] 1055 1056[system.terminal] 1057type=Terminal 1058intr_control=system.intrctrl 1059number=0 1060output=true 1061port=3456 1062 1063[system.vncserver] 1064type=VncServer 1065frame_capture=false 1066number=0 1067port=5900 1068 1069