simerr revision 11570
1warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes) 2warn: Sockets disabled, not accepting vnc client connections 3warn: Sockets disabled, not accepting terminal connections 4warn: Sockets disabled, not accepting gdb connections 5warn: ClockedObject: More than one power state change request encountered within the same simulation tick 6warn: ClockedObject: More than one power state change request encountered within the same simulation tick 7warn: Existing EnergyCtrl, but no enabled DVFSHandler found. 8warn: Not doing anything for miscreg ACTLR 9warn: Not doing anything for write of miscreg ACTLR 10warn: The clidr register always reports 0 caches. 11warn: clidr LoUIS field of 0b001 to match current ARM implementations. 12warn: The csselr register isn't implemented. 13warn: instruction 'mcr dccmvau' unimplemented 14warn: instruction 'mcr icimvau' unimplemented 15warn: instruction 'mcr bpiallis' unimplemented 16warn: instruction 'mcr icialluis' unimplemented 17warn: instruction 'mcr dccimvac' unimplemented 18warn: Tried to read RealView I/O at offset 0x60 that doesn't exist 19warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 20warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 21warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 22warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 23warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 24warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 25warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 26warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 27warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist 28warn: CP14 unimplemented crn[4], opc1[4], crm[0], opc2[0] 29warn: Not doing anything for miscreg ACTLR 30warn: Not doing anything for write of miscreg ACTLR 31warn: instruction 'mcr bpiall' unimplemented 32warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4] 33warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4] 34warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4] 35warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0] 36warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4] 37warn: allocating bonus target for snoop 38warn: allocating bonus target for snoop 39warn: Returning zero for read from miscreg pmcr 40warn: Ignoring write to miscreg pmcntenclr 41warn: Ignoring write to miscreg pmintenclr 42warn: Ignoring write to miscreg pmovsr 43warn: Ignoring write to miscreg pmcr 44warn: Ignoring write to miscreg pmcntenclr 45warn: Ignoring write to miscreg pmintenclr 46warn: Ignoring write to miscreg pmovsr 47warn: Ignoring write to miscreg pmcr 48warn: instruction 'mcr dcisw' unimplemented 49