simout revision 11374
111374Ssteve.reinhardt@amd.comRedirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual/simout 211374Ssteve.reinhardt@amd.comRedirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual/simerr 310260SAndrew.Bardsley@arm.comgem5 Simulator System. http://gem5.org 410260SAndrew.Bardsley@arm.comgem5 is copyrighted software; use the --copyright option for details. 510260SAndrew.Bardsley@arm.com 611374Ssteve.reinhardt@amd.comgem5 compiled Mar 15 2016 21:26:42 711374Ssteve.reinhardt@amd.comgem5 started Mar 15 2016 21:34:30 811374Ssteve.reinhardt@amd.comgem5 executing on phenom, pid 15961 911374Ssteve.reinhardt@amd.comcommand line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual 1010848SAndreas.Sandberg@ARM.com 1110260SAndrew.Bardsley@arm.comGlobal frequency set at 1000000000000 ticks per second 1211374Ssteve.reinhardt@amd.cominfo: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5 1310513SAli.Saidi@ARM.cominfo: Using bootloader at address 0x10 1410513SAli.Saidi@ARM.cominfo: Using kernel entry physical address at 0x80008000 1511374Ssteve.reinhardt@amd.cominfo: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000 1610260SAndrew.Bardsley@arm.cominfo: Entering event queue @ 0. Starting simulation... 1710513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 1810513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 1910513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2010513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2110513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2210513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2310513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2410513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2510513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2610513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2710513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2810513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 2910513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 3010513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 3110513SAli.Saidi@ARM.cominfo: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 3211374Ssteve.reinhardt@amd.comExiting @ tick 2649116242500 because m5_exit instruction encountered 33