config.ini revision 9449:56610ab73040
1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxAlphaSystem 11children=bridge cpu0 cpu1 disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami 12boot_cpu_frequency=500 13boot_osflags=root=/dev/hda1 console=ttyS0 14clock=1000 15console=/gem5/dist/binaries/console 16init_param=0 17kernel=/gem5/dist/binaries/vmlinux 18load_addr_mask=1099511627775 19mem_mode=timing 20mem_ranges=0:134217727 21memories=system.physmem 22num_work_ids=16 23pal=/gem5/dist/binaries/ts_osfpal 24readfile=tests/halt.sh 25symbolfile= 26system_rev=1024 27system_type=34 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 31work_cpus_ckpt_count=0 32work_end_ckpt_count=0 33work_end_exit_count=0 34work_item_id=-1 35system_port=system.membus.slave[0] 36 37[system.bridge] 38type=Bridge 39clock=1000 40delay=50000 41ranges=8796093022208:18446744073709551615 42req_size=16 43resp_size=16 44master=system.iobus.slave[0] 45slave=system.membus.master[0] 46 47[system.cpu0] 48type=DerivO3CPU 49children=dcache dtb fuPool icache interrupts isa itb tracer 50BTBEntries=4096 51BTBTagSize=16 52LFSTSize=1024 53LQEntries=32 54LSQCheckLoads=true 55LSQDepCheckShift=4 56RASSize=16 57SQEntries=32 58SSITSize=1024 59activity=0 60backComSize=5 61cachePorts=200 62checker=Null 63choiceCtrBits=2 64choicePredictorSize=8192 65clock=500 66commitToDecodeDelay=1 67commitToFetchDelay=1 68commitToIEWDelay=1 69commitToRenameDelay=1 70commitWidth=8 71cpu_id=0 72decodeToFetchDelay=1 73decodeToRenameDelay=1 74decodeWidth=8 75dispatchWidth=8 76do_checkpoint_insts=true 77do_quiesce=true 78do_statistics_insts=true 79dtb=system.cpu0.dtb 80fetchToDecodeDelay=1 81fetchTrapLatency=1 82fetchWidth=8 83forwardComSize=5 84fuPool=system.cpu0.fuPool 85function_trace=false 86function_trace_start=0 87globalCtrBits=2 88globalHistoryBits=13 89globalPredictorSize=8192 90iewToCommitDelay=1 91iewToDecodeDelay=1 92iewToFetchDelay=1 93iewToRenameDelay=1 94instShiftAmt=2 95interrupts=system.cpu0.interrupts 96isa=system.cpu0.isa 97issueToExecuteDelay=1 98issueWidth=8 99itb=system.cpu0.itb 100localCtrBits=2 101localHistoryBits=11 102localHistoryTableSize=2048 103localPredictorSize=2048 104max_insts_all_threads=0 105max_insts_any_thread=0 106max_loads_all_threads=0 107max_loads_any_thread=0 108needsTSO=false 109numIQEntries=64 110numPhysFloatRegs=256 111numPhysIntRegs=256 112numROBEntries=192 113numRobs=1 114numThreads=1 115predType=tournament 116profile=0 117progress_interval=0 118renameToDecodeDelay=1 119renameToFetchDelay=1 120renameToIEWDelay=2 121renameToROBDelay=1 122renameWidth=8 123smtCommitPolicy=RoundRobin 124smtFetchPolicy=SingleThread 125smtIQPolicy=Partitioned 126smtIQThreshold=100 127smtLSQPolicy=Partitioned 128smtLSQThreshold=100 129smtNumFetchingThreads=1 130smtROBPolicy=Partitioned 131smtROBThreshold=100 132squashWidth=8 133store_set_clear_period=250000 134switched_out=false 135system=system 136tracer=system.cpu0.tracer 137trapLatency=13 138wbDepth=1 139wbWidth=8 140workload= 141dcache_port=system.cpu0.dcache.cpu_side 142icache_port=system.cpu0.icache.cpu_side 143 144[system.cpu0.dcache] 145type=BaseCache 146addr_ranges=0:18446744073709551615 147assoc=4 148block_size=64 149clock=500 150forward_snoops=true 151hit_latency=2 152is_top_level=true 153max_miss_count=0 154mshrs=4 155prefetch_on_access=false 156prefetcher=Null 157response_latency=2 158size=32768 159system=system 160tgts_per_mshr=20 161two_queue=false 162write_buffers=8 163cpu_side=system.cpu0.dcache_port 164mem_side=system.toL2Bus.slave[1] 165 166[system.cpu0.dtb] 167type=AlphaTLB 168size=64 169 170[system.cpu0.fuPool] 171type=FUPool 172children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 173FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8 174 175[system.cpu0.fuPool.FUList0] 176type=FUDesc 177children=opList 178count=6 179opList=system.cpu0.fuPool.FUList0.opList 180 181[system.cpu0.fuPool.FUList0.opList] 182type=OpDesc 183issueLat=1 184opClass=IntAlu 185opLat=1 186 187[system.cpu0.fuPool.FUList1] 188type=FUDesc 189children=opList0 opList1 190count=2 191opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 192 193[system.cpu0.fuPool.FUList1.opList0] 194type=OpDesc 195issueLat=1 196opClass=IntMult 197opLat=3 198 199[system.cpu0.fuPool.FUList1.opList1] 200type=OpDesc 201issueLat=19 202opClass=IntDiv 203opLat=20 204 205[system.cpu0.fuPool.FUList2] 206type=FUDesc 207children=opList0 opList1 opList2 208count=4 209opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2 210 211[system.cpu0.fuPool.FUList2.opList0] 212type=OpDesc 213issueLat=1 214opClass=FloatAdd 215opLat=2 216 217[system.cpu0.fuPool.FUList2.opList1] 218type=OpDesc 219issueLat=1 220opClass=FloatCmp 221opLat=2 222 223[system.cpu0.fuPool.FUList2.opList2] 224type=OpDesc 225issueLat=1 226opClass=FloatCvt 227opLat=2 228 229[system.cpu0.fuPool.FUList3] 230type=FUDesc 231children=opList0 opList1 opList2 232count=2 233opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 234 235[system.cpu0.fuPool.FUList3.opList0] 236type=OpDesc 237issueLat=1 238opClass=FloatMult 239opLat=4 240 241[system.cpu0.fuPool.FUList3.opList1] 242type=OpDesc 243issueLat=12 244opClass=FloatDiv 245opLat=12 246 247[system.cpu0.fuPool.FUList3.opList2] 248type=OpDesc 249issueLat=24 250opClass=FloatSqrt 251opLat=24 252 253[system.cpu0.fuPool.FUList4] 254type=FUDesc 255children=opList 256count=0 257opList=system.cpu0.fuPool.FUList4.opList 258 259[system.cpu0.fuPool.FUList4.opList] 260type=OpDesc 261issueLat=1 262opClass=MemRead 263opLat=1 264 265[system.cpu0.fuPool.FUList5] 266type=FUDesc 267children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 268count=4 269opList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19 270 271[system.cpu0.fuPool.FUList5.opList00] 272type=OpDesc 273issueLat=1 274opClass=SimdAdd 275opLat=1 276 277[system.cpu0.fuPool.FUList5.opList01] 278type=OpDesc 279issueLat=1 280opClass=SimdAddAcc 281opLat=1 282 283[system.cpu0.fuPool.FUList5.opList02] 284type=OpDesc 285issueLat=1 286opClass=SimdAlu 287opLat=1 288 289[system.cpu0.fuPool.FUList5.opList03] 290type=OpDesc 291issueLat=1 292opClass=SimdCmp 293opLat=1 294 295[system.cpu0.fuPool.FUList5.opList04] 296type=OpDesc 297issueLat=1 298opClass=SimdCvt 299opLat=1 300 301[system.cpu0.fuPool.FUList5.opList05] 302type=OpDesc 303issueLat=1 304opClass=SimdMisc 305opLat=1 306 307[system.cpu0.fuPool.FUList5.opList06] 308type=OpDesc 309issueLat=1 310opClass=SimdMult 311opLat=1 312 313[system.cpu0.fuPool.FUList5.opList07] 314type=OpDesc 315issueLat=1 316opClass=SimdMultAcc 317opLat=1 318 319[system.cpu0.fuPool.FUList5.opList08] 320type=OpDesc 321issueLat=1 322opClass=SimdShift 323opLat=1 324 325[system.cpu0.fuPool.FUList5.opList09] 326type=OpDesc 327issueLat=1 328opClass=SimdShiftAcc 329opLat=1 330 331[system.cpu0.fuPool.FUList5.opList10] 332type=OpDesc 333issueLat=1 334opClass=SimdSqrt 335opLat=1 336 337[system.cpu0.fuPool.FUList5.opList11] 338type=OpDesc 339issueLat=1 340opClass=SimdFloatAdd 341opLat=1 342 343[system.cpu0.fuPool.FUList5.opList12] 344type=OpDesc 345issueLat=1 346opClass=SimdFloatAlu 347opLat=1 348 349[system.cpu0.fuPool.FUList5.opList13] 350type=OpDesc 351issueLat=1 352opClass=SimdFloatCmp 353opLat=1 354 355[system.cpu0.fuPool.FUList5.opList14] 356type=OpDesc 357issueLat=1 358opClass=SimdFloatCvt 359opLat=1 360 361[system.cpu0.fuPool.FUList5.opList15] 362type=OpDesc 363issueLat=1 364opClass=SimdFloatDiv 365opLat=1 366 367[system.cpu0.fuPool.FUList5.opList16] 368type=OpDesc 369issueLat=1 370opClass=SimdFloatMisc 371opLat=1 372 373[system.cpu0.fuPool.FUList5.opList17] 374type=OpDesc 375issueLat=1 376opClass=SimdFloatMult 377opLat=1 378 379[system.cpu0.fuPool.FUList5.opList18] 380type=OpDesc 381issueLat=1 382opClass=SimdFloatMultAcc 383opLat=1 384 385[system.cpu0.fuPool.FUList5.opList19] 386type=OpDesc 387issueLat=1 388opClass=SimdFloatSqrt 389opLat=1 390 391[system.cpu0.fuPool.FUList6] 392type=FUDesc 393children=opList 394count=0 395opList=system.cpu0.fuPool.FUList6.opList 396 397[system.cpu0.fuPool.FUList6.opList] 398type=OpDesc 399issueLat=1 400opClass=MemWrite 401opLat=1 402 403[system.cpu0.fuPool.FUList7] 404type=FUDesc 405children=opList0 opList1 406count=4 407opList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 408 409[system.cpu0.fuPool.FUList7.opList0] 410type=OpDesc 411issueLat=1 412opClass=MemRead 413opLat=1 414 415[system.cpu0.fuPool.FUList7.opList1] 416type=OpDesc 417issueLat=1 418opClass=MemWrite 419opLat=1 420 421[system.cpu0.fuPool.FUList8] 422type=FUDesc 423children=opList 424count=1 425opList=system.cpu0.fuPool.FUList8.opList 426 427[system.cpu0.fuPool.FUList8.opList] 428type=OpDesc 429issueLat=3 430opClass=IprAccess 431opLat=3 432 433[system.cpu0.icache] 434type=BaseCache 435addr_ranges=0:18446744073709551615 436assoc=1 437block_size=64 438clock=500 439forward_snoops=true 440hit_latency=2 441is_top_level=true 442max_miss_count=0 443mshrs=4 444prefetch_on_access=false 445prefetcher=Null 446response_latency=2 447size=32768 448system=system 449tgts_per_mshr=20 450two_queue=false 451write_buffers=8 452cpu_side=system.cpu0.icache_port 453mem_side=system.toL2Bus.slave[0] 454 455[system.cpu0.interrupts] 456type=AlphaInterrupts 457 458[system.cpu0.isa] 459type=AlphaISA 460 461[system.cpu0.itb] 462type=AlphaTLB 463size=48 464 465[system.cpu0.tracer] 466type=ExeTracer 467 468[system.cpu1] 469type=DerivO3CPU 470children=dcache dtb fuPool icache interrupts isa itb tracer 471BTBEntries=4096 472BTBTagSize=16 473LFSTSize=1024 474LQEntries=32 475LSQCheckLoads=true 476LSQDepCheckShift=4 477RASSize=16 478SQEntries=32 479SSITSize=1024 480activity=0 481backComSize=5 482cachePorts=200 483checker=Null 484choiceCtrBits=2 485choicePredictorSize=8192 486clock=500 487commitToDecodeDelay=1 488commitToFetchDelay=1 489commitToIEWDelay=1 490commitToRenameDelay=1 491commitWidth=8 492cpu_id=1 493decodeToFetchDelay=1 494decodeToRenameDelay=1 495decodeWidth=8 496dispatchWidth=8 497do_checkpoint_insts=true 498do_quiesce=true 499do_statistics_insts=true 500dtb=system.cpu1.dtb 501fetchToDecodeDelay=1 502fetchTrapLatency=1 503fetchWidth=8 504forwardComSize=5 505fuPool=system.cpu1.fuPool 506function_trace=false 507function_trace_start=0 508globalCtrBits=2 509globalHistoryBits=13 510globalPredictorSize=8192 511iewToCommitDelay=1 512iewToDecodeDelay=1 513iewToFetchDelay=1 514iewToRenameDelay=1 515instShiftAmt=2 516interrupts=system.cpu1.interrupts 517isa=system.cpu1.isa 518issueToExecuteDelay=1 519issueWidth=8 520itb=system.cpu1.itb 521localCtrBits=2 522localHistoryBits=11 523localHistoryTableSize=2048 524localPredictorSize=2048 525max_insts_all_threads=0 526max_insts_any_thread=0 527max_loads_all_threads=0 528max_loads_any_thread=0 529needsTSO=false 530numIQEntries=64 531numPhysFloatRegs=256 532numPhysIntRegs=256 533numROBEntries=192 534numRobs=1 535numThreads=1 536predType=tournament 537profile=0 538progress_interval=0 539renameToDecodeDelay=1 540renameToFetchDelay=1 541renameToIEWDelay=2 542renameToROBDelay=1 543renameWidth=8 544smtCommitPolicy=RoundRobin 545smtFetchPolicy=SingleThread 546smtIQPolicy=Partitioned 547smtIQThreshold=100 548smtLSQPolicy=Partitioned 549smtLSQThreshold=100 550smtNumFetchingThreads=1 551smtROBPolicy=Partitioned 552smtROBThreshold=100 553squashWidth=8 554store_set_clear_period=250000 555switched_out=false 556system=system 557tracer=system.cpu1.tracer 558trapLatency=13 559wbDepth=1 560wbWidth=8 561workload= 562dcache_port=system.cpu1.dcache.cpu_side 563icache_port=system.cpu1.icache.cpu_side 564 565[system.cpu1.dcache] 566type=BaseCache 567addr_ranges=0:18446744073709551615 568assoc=4 569block_size=64 570clock=500 571forward_snoops=true 572hit_latency=2 573is_top_level=true 574max_miss_count=0 575mshrs=4 576prefetch_on_access=false 577prefetcher=Null 578response_latency=2 579size=32768 580system=system 581tgts_per_mshr=20 582two_queue=false 583write_buffers=8 584cpu_side=system.cpu1.dcache_port 585mem_side=system.toL2Bus.slave[3] 586 587[system.cpu1.dtb] 588type=AlphaTLB 589size=64 590 591[system.cpu1.fuPool] 592type=FUPool 593children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 594FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8 595 596[system.cpu1.fuPool.FUList0] 597type=FUDesc 598children=opList 599count=6 600opList=system.cpu1.fuPool.FUList0.opList 601 602[system.cpu1.fuPool.FUList0.opList] 603type=OpDesc 604issueLat=1 605opClass=IntAlu 606opLat=1 607 608[system.cpu1.fuPool.FUList1] 609type=FUDesc 610children=opList0 opList1 611count=2 612opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 613 614[system.cpu1.fuPool.FUList1.opList0] 615type=OpDesc 616issueLat=1 617opClass=IntMult 618opLat=3 619 620[system.cpu1.fuPool.FUList1.opList1] 621type=OpDesc 622issueLat=19 623opClass=IntDiv 624opLat=20 625 626[system.cpu1.fuPool.FUList2] 627type=FUDesc 628children=opList0 opList1 opList2 629count=4 630opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2 631 632[system.cpu1.fuPool.FUList2.opList0] 633type=OpDesc 634issueLat=1 635opClass=FloatAdd 636opLat=2 637 638[system.cpu1.fuPool.FUList2.opList1] 639type=OpDesc 640issueLat=1 641opClass=FloatCmp 642opLat=2 643 644[system.cpu1.fuPool.FUList2.opList2] 645type=OpDesc 646issueLat=1 647opClass=FloatCvt 648opLat=2 649 650[system.cpu1.fuPool.FUList3] 651type=FUDesc 652children=opList0 opList1 opList2 653count=2 654opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 system.cpu1.fuPool.FUList3.opList2 655 656[system.cpu1.fuPool.FUList3.opList0] 657type=OpDesc 658issueLat=1 659opClass=FloatMult 660opLat=4 661 662[system.cpu1.fuPool.FUList3.opList1] 663type=OpDesc 664issueLat=12 665opClass=FloatDiv 666opLat=12 667 668[system.cpu1.fuPool.FUList3.opList2] 669type=OpDesc 670issueLat=24 671opClass=FloatSqrt 672opLat=24 673 674[system.cpu1.fuPool.FUList4] 675type=FUDesc 676children=opList 677count=0 678opList=system.cpu1.fuPool.FUList4.opList 679 680[system.cpu1.fuPool.FUList4.opList] 681type=OpDesc 682issueLat=1 683opClass=MemRead 684opLat=1 685 686[system.cpu1.fuPool.FUList5] 687type=FUDesc 688children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 689count=4 690opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19 691 692[system.cpu1.fuPool.FUList5.opList00] 693type=OpDesc 694issueLat=1 695opClass=SimdAdd 696opLat=1 697 698[system.cpu1.fuPool.FUList5.opList01] 699type=OpDesc 700issueLat=1 701opClass=SimdAddAcc 702opLat=1 703 704[system.cpu1.fuPool.FUList5.opList02] 705type=OpDesc 706issueLat=1 707opClass=SimdAlu 708opLat=1 709 710[system.cpu1.fuPool.FUList5.opList03] 711type=OpDesc 712issueLat=1 713opClass=SimdCmp 714opLat=1 715 716[system.cpu1.fuPool.FUList5.opList04] 717type=OpDesc 718issueLat=1 719opClass=SimdCvt 720opLat=1 721 722[system.cpu1.fuPool.FUList5.opList05] 723type=OpDesc 724issueLat=1 725opClass=SimdMisc 726opLat=1 727 728[system.cpu1.fuPool.FUList5.opList06] 729type=OpDesc 730issueLat=1 731opClass=SimdMult 732opLat=1 733 734[system.cpu1.fuPool.FUList5.opList07] 735type=OpDesc 736issueLat=1 737opClass=SimdMultAcc 738opLat=1 739 740[system.cpu1.fuPool.FUList5.opList08] 741type=OpDesc 742issueLat=1 743opClass=SimdShift 744opLat=1 745 746[system.cpu1.fuPool.FUList5.opList09] 747type=OpDesc 748issueLat=1 749opClass=SimdShiftAcc 750opLat=1 751 752[system.cpu1.fuPool.FUList5.opList10] 753type=OpDesc 754issueLat=1 755opClass=SimdSqrt 756opLat=1 757 758[system.cpu1.fuPool.FUList5.opList11] 759type=OpDesc 760issueLat=1 761opClass=SimdFloatAdd 762opLat=1 763 764[system.cpu1.fuPool.FUList5.opList12] 765type=OpDesc 766issueLat=1 767opClass=SimdFloatAlu 768opLat=1 769 770[system.cpu1.fuPool.FUList5.opList13] 771type=OpDesc 772issueLat=1 773opClass=SimdFloatCmp 774opLat=1 775 776[system.cpu1.fuPool.FUList5.opList14] 777type=OpDesc 778issueLat=1 779opClass=SimdFloatCvt 780opLat=1 781 782[system.cpu1.fuPool.FUList5.opList15] 783type=OpDesc 784issueLat=1 785opClass=SimdFloatDiv 786opLat=1 787 788[system.cpu1.fuPool.FUList5.opList16] 789type=OpDesc 790issueLat=1 791opClass=SimdFloatMisc 792opLat=1 793 794[system.cpu1.fuPool.FUList5.opList17] 795type=OpDesc 796issueLat=1 797opClass=SimdFloatMult 798opLat=1 799 800[system.cpu1.fuPool.FUList5.opList18] 801type=OpDesc 802issueLat=1 803opClass=SimdFloatMultAcc 804opLat=1 805 806[system.cpu1.fuPool.FUList5.opList19] 807type=OpDesc 808issueLat=1 809opClass=SimdFloatSqrt 810opLat=1 811 812[system.cpu1.fuPool.FUList6] 813type=FUDesc 814children=opList 815count=0 816opList=system.cpu1.fuPool.FUList6.opList 817 818[system.cpu1.fuPool.FUList6.opList] 819type=OpDesc 820issueLat=1 821opClass=MemWrite 822opLat=1 823 824[system.cpu1.fuPool.FUList7] 825type=FUDesc 826children=opList0 opList1 827count=4 828opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 829 830[system.cpu1.fuPool.FUList7.opList0] 831type=OpDesc 832issueLat=1 833opClass=MemRead 834opLat=1 835 836[system.cpu1.fuPool.FUList7.opList1] 837type=OpDesc 838issueLat=1 839opClass=MemWrite 840opLat=1 841 842[system.cpu1.fuPool.FUList8] 843type=FUDesc 844children=opList 845count=1 846opList=system.cpu1.fuPool.FUList8.opList 847 848[system.cpu1.fuPool.FUList8.opList] 849type=OpDesc 850issueLat=3 851opClass=IprAccess 852opLat=3 853 854[system.cpu1.icache] 855type=BaseCache 856addr_ranges=0:18446744073709551615 857assoc=1 858block_size=64 859clock=500 860forward_snoops=true 861hit_latency=2 862is_top_level=true 863max_miss_count=0 864mshrs=4 865prefetch_on_access=false 866prefetcher=Null 867response_latency=2 868size=32768 869system=system 870tgts_per_mshr=20 871two_queue=false 872write_buffers=8 873cpu_side=system.cpu1.icache_port 874mem_side=system.toL2Bus.slave[2] 875 876[system.cpu1.interrupts] 877type=AlphaInterrupts 878 879[system.cpu1.isa] 880type=AlphaISA 881 882[system.cpu1.itb] 883type=AlphaTLB 884size=48 885 886[system.cpu1.tracer] 887type=ExeTracer 888 889[system.disk0] 890type=IdeDisk 891children=image 892delay=1000000 893driveID=master 894image=system.disk0.image 895 896[system.disk0.image] 897type=CowDiskImage 898children=child 899child=system.disk0.image.child 900image_file= 901read_only=false 902table_size=65536 903 904[system.disk0.image.child] 905type=RawDiskImage 906image_file=/gem5/dist/disks/linux-latest.img 907read_only=true 908 909[system.disk2] 910type=IdeDisk 911children=image 912delay=1000000 913driveID=master 914image=system.disk2.image 915 916[system.disk2.image] 917type=CowDiskImage 918children=child 919child=system.disk2.image.child 920image_file= 921read_only=false 922table_size=65536 923 924[system.disk2.image.child] 925type=RawDiskImage 926image_file=/gem5/dist/disks/linux-bigswap2.img 927read_only=true 928 929[system.intrctrl] 930type=IntrControl 931sys=system 932 933[system.iobus] 934type=NoncoherentBus 935block_size=64 936clock=1000 937header_cycles=1 938use_default_range=true 939width=8 940default=system.tsunami.pciconfig.pio 941master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 942slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 943 944[system.iocache] 945type=BaseCache 946addr_ranges=0:134217727 947assoc=8 948block_size=64 949clock=1000 950forward_snoops=false 951hit_latency=50 952is_top_level=true 953max_miss_count=0 954mshrs=20 955prefetch_on_access=false 956prefetcher=Null 957response_latency=50 958size=1024 959system=system 960tgts_per_mshr=12 961two_queue=false 962write_buffers=8 963cpu_side=system.iobus.master[29] 964mem_side=system.membus.slave[2] 965 966[system.l2c] 967type=BaseCache 968addr_ranges=0:18446744073709551615 969assoc=8 970block_size=64 971clock=500 972forward_snoops=true 973hit_latency=20 974is_top_level=false 975max_miss_count=0 976mshrs=20 977prefetch_on_access=false 978prefetcher=Null 979response_latency=20 980size=4194304 981system=system 982tgts_per_mshr=12 983two_queue=false 984write_buffers=8 985cpu_side=system.toL2Bus.master[0] 986mem_side=system.membus.slave[1] 987 988[system.membus] 989type=CoherentBus 990children=badaddr_responder 991block_size=64 992clock=1000 993header_cycles=1 994use_default_range=false 995width=8 996default=system.membus.badaddr_responder.pio 997master=system.bridge.slave system.physmem.port 998slave=system.system_port system.l2c.mem_side system.iocache.mem_side 999 1000[system.membus.badaddr_responder] 1001type=IsaFake 1002clock=1000 1003fake_mem=false 1004pio_addr=0 1005pio_latency=100000 1006pio_size=8 1007ret_bad_addr=true 1008ret_data16=65535 1009ret_data32=4294967295 1010ret_data64=18446744073709551615 1011ret_data8=255 1012system=system 1013update_data=false 1014warn_access= 1015pio=system.membus.default 1016 1017[system.physmem] 1018type=SimpleDRAM 1019addr_mapping=openmap 1020banks_per_rank=8 1021clock=1000 1022conf_table_reported=false 1023in_addr_map=true 1024lines_per_rowbuffer=64 1025mem_sched_policy=fcfs 1026null=false 1027page_policy=open 1028range=0:134217727 1029ranks_per_channel=2 1030read_buffer_size=32 1031tBURST=4000 1032tCL=14000 1033tRCD=14000 1034tREFI=7800000 1035tRFC=300000 1036tRP=14000 1037tWTR=1000 1038write_buffer_size=32 1039write_thresh_perc=70 1040zero=false 1041port=system.membus.master[1] 1042 1043[system.simple_disk] 1044type=SimpleDisk 1045children=disk 1046disk=system.simple_disk.disk 1047system=system 1048 1049[system.simple_disk.disk] 1050type=RawDiskImage 1051image_file=/gem5/dist/disks/linux-latest.img 1052read_only=true 1053 1054[system.terminal] 1055type=Terminal 1056intr_control=system.intrctrl 1057number=0 1058output=true 1059port=3456 1060 1061[system.toL2Bus] 1062type=CoherentBus 1063block_size=64 1064clock=500 1065header_cycles=1 1066use_default_range=false 1067width=8 1068master=system.l2c.cpu_side 1069slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 1070 1071[system.tsunami] 1072type=Tsunami 1073children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 1074intrctrl=system.intrctrl 1075system=system 1076 1077[system.tsunami.backdoor] 1078type=AlphaBackdoor 1079clock=1000 1080cpu=system.cpu0 1081disk=system.simple_disk 1082pio_addr=8804682956800 1083pio_latency=100000 1084platform=system.tsunami 1085system=system 1086terminal=system.terminal 1087pio=system.iobus.master[24] 1088 1089[system.tsunami.cchip] 1090type=TsunamiCChip 1091clock=1000 1092pio_addr=8803072344064 1093pio_latency=100000 1094system=system 1095tsunami=system.tsunami 1096pio=system.iobus.master[0] 1097 1098[system.tsunami.ethernet] 1099type=NSGigE 1100BAR0=1 1101BAR0LegacyIO=false 1102BAR0Size=256 1103BAR1=0 1104BAR1LegacyIO=false 1105BAR1Size=4096 1106BAR2=0 1107BAR2LegacyIO=false 1108BAR2Size=0 1109BAR3=0 1110BAR3LegacyIO=false 1111BAR3Size=0 1112BAR4=0 1113BAR4LegacyIO=false 1114BAR4Size=0 1115BAR5=0 1116BAR5LegacyIO=false 1117BAR5Size=0 1118BIST=0 1119CacheLineSize=0 1120CardbusCIS=0 1121ClassCode=2 1122Command=0 1123DeviceID=34 1124ExpansionROM=0 1125HeaderType=0 1126InterruptLine=30 1127InterruptPin=1 1128LatencyTimer=0 1129MaximumLatency=52 1130MinimumGrant=176 1131ProgIF=0 1132Revision=0 1133Status=656 1134SubClassCode=0 1135SubsystemID=0 1136SubsystemVendorID=0 1137VendorID=4107 1138clock=2000 1139config_latency=20000 1140dma_data_free=false 1141dma_desc_free=false 1142dma_no_allocate=true 1143dma_read_delay=0 1144dma_read_factor=0 1145dma_write_delay=0 1146dma_write_factor=0 1147hardware_address=00:90:00:00:00:01 1148intr_delay=10000000 1149pci_bus=0 1150pci_dev=1 1151pci_func=0 1152pio_latency=30000 1153platform=system.tsunami 1154rss=false 1155rx_delay=1000000 1156rx_fifo_size=524288 1157rx_filter=true 1158rx_thread=false 1159system=system 1160tx_delay=1000000 1161tx_fifo_size=524288 1162tx_thread=false 1163config=system.iobus.master[28] 1164dma=system.iobus.slave[2] 1165pio=system.iobus.master[27] 1166 1167[system.tsunami.fake_OROM] 1168type=IsaFake 1169clock=1000 1170fake_mem=false 1171pio_addr=8796093677568 1172pio_latency=100000 1173pio_size=393216 1174ret_bad_addr=false 1175ret_data16=65535 1176ret_data32=4294967295 1177ret_data64=18446744073709551615 1178ret_data8=255 1179system=system 1180update_data=false 1181warn_access= 1182pio=system.iobus.master[8] 1183 1184[system.tsunami.fake_ata0] 1185type=IsaFake 1186clock=1000 1187fake_mem=false 1188pio_addr=8804615848432 1189pio_latency=100000 1190pio_size=8 1191ret_bad_addr=false 1192ret_data16=65535 1193ret_data32=4294967295 1194ret_data64=18446744073709551615 1195ret_data8=255 1196system=system 1197update_data=false 1198warn_access= 1199pio=system.iobus.master[19] 1200 1201[system.tsunami.fake_ata1] 1202type=IsaFake 1203clock=1000 1204fake_mem=false 1205pio_addr=8804615848304 1206pio_latency=100000 1207pio_size=8 1208ret_bad_addr=false 1209ret_data16=65535 1210ret_data32=4294967295 1211ret_data64=18446744073709551615 1212ret_data8=255 1213system=system 1214update_data=false 1215warn_access= 1216pio=system.iobus.master[20] 1217 1218[system.tsunami.fake_pnp_addr] 1219type=IsaFake 1220clock=1000 1221fake_mem=false 1222pio_addr=8804615848569 1223pio_latency=100000 1224pio_size=8 1225ret_bad_addr=false 1226ret_data16=65535 1227ret_data32=4294967295 1228ret_data64=18446744073709551615 1229ret_data8=255 1230system=system 1231update_data=false 1232warn_access= 1233pio=system.iobus.master[9] 1234 1235[system.tsunami.fake_pnp_read0] 1236type=IsaFake 1237clock=1000 1238fake_mem=false 1239pio_addr=8804615848451 1240pio_latency=100000 1241pio_size=8 1242ret_bad_addr=false 1243ret_data16=65535 1244ret_data32=4294967295 1245ret_data64=18446744073709551615 1246ret_data8=255 1247system=system 1248update_data=false 1249warn_access= 1250pio=system.iobus.master[11] 1251 1252[system.tsunami.fake_pnp_read1] 1253type=IsaFake 1254clock=1000 1255fake_mem=false 1256pio_addr=8804615848515 1257pio_latency=100000 1258pio_size=8 1259ret_bad_addr=false 1260ret_data16=65535 1261ret_data32=4294967295 1262ret_data64=18446744073709551615 1263ret_data8=255 1264system=system 1265update_data=false 1266warn_access= 1267pio=system.iobus.master[12] 1268 1269[system.tsunami.fake_pnp_read2] 1270type=IsaFake 1271clock=1000 1272fake_mem=false 1273pio_addr=8804615848579 1274pio_latency=100000 1275pio_size=8 1276ret_bad_addr=false 1277ret_data16=65535 1278ret_data32=4294967295 1279ret_data64=18446744073709551615 1280ret_data8=255 1281system=system 1282update_data=false 1283warn_access= 1284pio=system.iobus.master[13] 1285 1286[system.tsunami.fake_pnp_read3] 1287type=IsaFake 1288clock=1000 1289fake_mem=false 1290pio_addr=8804615848643 1291pio_latency=100000 1292pio_size=8 1293ret_bad_addr=false 1294ret_data16=65535 1295ret_data32=4294967295 1296ret_data64=18446744073709551615 1297ret_data8=255 1298system=system 1299update_data=false 1300warn_access= 1301pio=system.iobus.master[14] 1302 1303[system.tsunami.fake_pnp_read4] 1304type=IsaFake 1305clock=1000 1306fake_mem=false 1307pio_addr=8804615848707 1308pio_latency=100000 1309pio_size=8 1310ret_bad_addr=false 1311ret_data16=65535 1312ret_data32=4294967295 1313ret_data64=18446744073709551615 1314ret_data8=255 1315system=system 1316update_data=false 1317warn_access= 1318pio=system.iobus.master[15] 1319 1320[system.tsunami.fake_pnp_read5] 1321type=IsaFake 1322clock=1000 1323fake_mem=false 1324pio_addr=8804615848771 1325pio_latency=100000 1326pio_size=8 1327ret_bad_addr=false 1328ret_data16=65535 1329ret_data32=4294967295 1330ret_data64=18446744073709551615 1331ret_data8=255 1332system=system 1333update_data=false 1334warn_access= 1335pio=system.iobus.master[16] 1336 1337[system.tsunami.fake_pnp_read6] 1338type=IsaFake 1339clock=1000 1340fake_mem=false 1341pio_addr=8804615848835 1342pio_latency=100000 1343pio_size=8 1344ret_bad_addr=false 1345ret_data16=65535 1346ret_data32=4294967295 1347ret_data64=18446744073709551615 1348ret_data8=255 1349system=system 1350update_data=false 1351warn_access= 1352pio=system.iobus.master[17] 1353 1354[system.tsunami.fake_pnp_read7] 1355type=IsaFake 1356clock=1000 1357fake_mem=false 1358pio_addr=8804615848899 1359pio_latency=100000 1360pio_size=8 1361ret_bad_addr=false 1362ret_data16=65535 1363ret_data32=4294967295 1364ret_data64=18446744073709551615 1365ret_data8=255 1366system=system 1367update_data=false 1368warn_access= 1369pio=system.iobus.master[18] 1370 1371[system.tsunami.fake_pnp_write] 1372type=IsaFake 1373clock=1000 1374fake_mem=false 1375pio_addr=8804615850617 1376pio_latency=100000 1377pio_size=8 1378ret_bad_addr=false 1379ret_data16=65535 1380ret_data32=4294967295 1381ret_data64=18446744073709551615 1382ret_data8=255 1383system=system 1384update_data=false 1385warn_access= 1386pio=system.iobus.master[10] 1387 1388[system.tsunami.fake_ppc] 1389type=IsaFake 1390clock=1000 1391fake_mem=false 1392pio_addr=8804615848891 1393pio_latency=100000 1394pio_size=8 1395ret_bad_addr=false 1396ret_data16=65535 1397ret_data32=4294967295 1398ret_data64=18446744073709551615 1399ret_data8=255 1400system=system 1401update_data=false 1402warn_access= 1403pio=system.iobus.master[7] 1404 1405[system.tsunami.fake_sm_chip] 1406type=IsaFake 1407clock=1000 1408fake_mem=false 1409pio_addr=8804615848816 1410pio_latency=100000 1411pio_size=8 1412ret_bad_addr=false 1413ret_data16=65535 1414ret_data32=4294967295 1415ret_data64=18446744073709551615 1416ret_data8=255 1417system=system 1418update_data=false 1419warn_access= 1420pio=system.iobus.master[2] 1421 1422[system.tsunami.fake_uart1] 1423type=IsaFake 1424clock=1000 1425fake_mem=false 1426pio_addr=8804615848696 1427pio_latency=100000 1428pio_size=8 1429ret_bad_addr=false 1430ret_data16=65535 1431ret_data32=4294967295 1432ret_data64=18446744073709551615 1433ret_data8=255 1434system=system 1435update_data=false 1436warn_access= 1437pio=system.iobus.master[3] 1438 1439[system.tsunami.fake_uart2] 1440type=IsaFake 1441clock=1000 1442fake_mem=false 1443pio_addr=8804615848936 1444pio_latency=100000 1445pio_size=8 1446ret_bad_addr=false 1447ret_data16=65535 1448ret_data32=4294967295 1449ret_data64=18446744073709551615 1450ret_data8=255 1451system=system 1452update_data=false 1453warn_access= 1454pio=system.iobus.master[4] 1455 1456[system.tsunami.fake_uart3] 1457type=IsaFake 1458clock=1000 1459fake_mem=false 1460pio_addr=8804615848680 1461pio_latency=100000 1462pio_size=8 1463ret_bad_addr=false 1464ret_data16=65535 1465ret_data32=4294967295 1466ret_data64=18446744073709551615 1467ret_data8=255 1468system=system 1469update_data=false 1470warn_access= 1471pio=system.iobus.master[5] 1472 1473[system.tsunami.fake_uart4] 1474type=IsaFake 1475clock=1000 1476fake_mem=false 1477pio_addr=8804615848944 1478pio_latency=100000 1479pio_size=8 1480ret_bad_addr=false 1481ret_data16=65535 1482ret_data32=4294967295 1483ret_data64=18446744073709551615 1484ret_data8=255 1485system=system 1486update_data=false 1487warn_access= 1488pio=system.iobus.master[6] 1489 1490[system.tsunami.fb] 1491type=BadDevice 1492clock=1000 1493devicename=FrameBuffer 1494pio_addr=8804615848912 1495pio_latency=100000 1496system=system 1497pio=system.iobus.master[21] 1498 1499[system.tsunami.ide] 1500type=IdeController 1501BAR0=1 1502BAR0LegacyIO=false 1503BAR0Size=8 1504BAR1=1 1505BAR1LegacyIO=false 1506BAR1Size=4 1507BAR2=1 1508BAR2LegacyIO=false 1509BAR2Size=8 1510BAR3=1 1511BAR3LegacyIO=false 1512BAR3Size=4 1513BAR4=1 1514BAR4LegacyIO=false 1515BAR4Size=16 1516BAR5=1 1517BAR5LegacyIO=false 1518BAR5Size=0 1519BIST=0 1520CacheLineSize=0 1521CardbusCIS=0 1522ClassCode=1 1523Command=0 1524DeviceID=28945 1525ExpansionROM=0 1526HeaderType=0 1527InterruptLine=31 1528InterruptPin=1 1529LatencyTimer=0 1530MaximumLatency=0 1531MinimumGrant=0 1532ProgIF=133 1533Revision=0 1534Status=640 1535SubClassCode=1 1536SubsystemID=0 1537SubsystemVendorID=0 1538VendorID=32902 1539clock=1000 1540config_latency=20000 1541ctrl_offset=0 1542disks=system.disk0 system.disk2 1543io_shift=0 1544pci_bus=0 1545pci_dev=0 1546pci_func=0 1547pio_latency=30000 1548platform=system.tsunami 1549system=system 1550config=system.iobus.master[26] 1551dma=system.iobus.slave[1] 1552pio=system.iobus.master[25] 1553 1554[system.tsunami.io] 1555type=TsunamiIO 1556clock=1000 1557frequency=976562500 1558pio_addr=8804615847936 1559pio_latency=100000 1560system=system 1561time=Thu Jan 1 00:00:00 2009 1562tsunami=system.tsunami 1563year_is_bcd=false 1564pio=system.iobus.master[22] 1565 1566[system.tsunami.pchip] 1567type=TsunamiPChip 1568clock=1000 1569pio_addr=8802535473152 1570pio_latency=100000 1571system=system 1572tsunami=system.tsunami 1573pio=system.iobus.master[1] 1574 1575[system.tsunami.pciconfig] 1576type=PciConfigAll 1577bus=0 1578clock=1000 1579pio_latency=30000 1580platform=system.tsunami 1581size=16777216 1582system=system 1583pio=system.iobus.default 1584 1585[system.tsunami.uart] 1586type=Uart8250 1587clock=1000 1588pio_addr=8804615848952 1589pio_latency=100000 1590platform=system.tsunami 1591system=system 1592terminal=system.terminal 1593pio=system.iobus.master[23] 1594 1595