config.ini revision 9134:275232ad377d
1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxAlphaSystem 11children=bridge cpu0 cpu1 disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami 12boot_cpu_frequency=500 13boot_osflags=root=/dev/hda1 console=ttyS0 14console=/dist/m5/system/binaries/console 15init_param=0 16kernel=/dist/m5/system/binaries/vmlinux 17load_addr_mask=1099511627775 18mem_mode=timing 19memories=system.physmem 20num_work_ids=16 21pal=/dist/m5/system/binaries/ts_osfpal 22readfile=tests/halt.sh 23symbolfile= 24system_rev=1024 25system_type=34 26work_begin_ckpt_count=0 27work_begin_cpu_id_exit=-1 28work_begin_exit_count=0 29work_cpus_ckpt_count=0 30work_end_ckpt_count=0 31work_end_exit_count=0 32work_item_id=-1 33system_port=system.membus.slave[0] 34 35[system.bridge] 36type=Bridge 37delay=50000 38nack_delay=4000 39ranges=8796093022208:18446744073709551615 40req_size=16 41resp_size=16 42write_ack=false 43master=system.iobus.slave[0] 44slave=system.membus.master[0] 45 46[system.cpu0] 47type=DerivO3CPU 48children=dcache dtb fuPool icache interrupts itb tracer 49BTBEntries=4096 50BTBTagSize=16 51LFSTSize=1024 52LQEntries=32 53LSQCheckLoads=true 54LSQDepCheckShift=4 55RASSize=16 56SQEntries=32 57SSITSize=1024 58activity=0 59backComSize=5 60cachePorts=200 61checker=Null 62choiceCtrBits=2 63choicePredictorSize=8192 64clock=500 65commitToDecodeDelay=1 66commitToFetchDelay=1 67commitToIEWDelay=1 68commitToRenameDelay=1 69commitWidth=8 70cpu_id=0 71decodeToFetchDelay=1 72decodeToRenameDelay=1 73decodeWidth=8 74defer_registration=false 75dispatchWidth=8 76do_checkpoint_insts=true 77do_quiesce=true 78do_statistics_insts=true 79dtb=system.cpu0.dtb 80fetchToDecodeDelay=1 81fetchTrapLatency=1 82fetchWidth=8 83forwardComSize=5 84fuPool=system.cpu0.fuPool 85function_trace=false 86function_trace_start=0 87globalCtrBits=2 88globalHistoryBits=13 89globalPredictorSize=8192 90iewToCommitDelay=1 91iewToDecodeDelay=1 92iewToFetchDelay=1 93iewToRenameDelay=1 94instShiftAmt=2 95interrupts=system.cpu0.interrupts 96issueToExecuteDelay=1 97issueWidth=8 98itb=system.cpu0.itb 99localCtrBits=2 100localHistoryBits=11 101localHistoryTableSize=2048 102localPredictorSize=2048 103max_insts_all_threads=0 104max_insts_any_thread=0 105max_loads_all_threads=0 106max_loads_any_thread=0 107needsTSO=false 108numIQEntries=64 109numPhysFloatRegs=256 110numPhysIntRegs=256 111numROBEntries=192 112numRobs=1 113numThreads=1 114phase=0 115predType=tournament 116profile=0 117progress_interval=0 118renameToDecodeDelay=1 119renameToFetchDelay=1 120renameToIEWDelay=2 121renameToROBDelay=1 122renameWidth=8 123smtCommitPolicy=RoundRobin 124smtFetchPolicy=SingleThread 125smtIQPolicy=Partitioned 126smtIQThreshold=100 127smtLSQPolicy=Partitioned 128smtLSQThreshold=100 129smtNumFetchingThreads=1 130smtROBPolicy=Partitioned 131smtROBThreshold=100 132squashWidth=8 133store_set_clear_period=250000 134system=system 135tracer=system.cpu0.tracer 136trapLatency=13 137wbDepth=1 138wbWidth=8 139workload= 140dcache_port=system.cpu0.dcache.cpu_side 141icache_port=system.cpu0.icache.cpu_side 142 143[system.cpu0.dcache] 144type=BaseCache 145addr_ranges=0:18446744073709551615 146assoc=4 147block_size=64 148forward_snoops=true 149hash_delay=1 150is_top_level=true 151latency=1000 152max_miss_count=0 153mshrs=4 154prefetch_on_access=false 155prefetcher=Null 156prioritizeRequests=false 157repl=Null 158size=32768 159subblock_size=0 160system=system 161tgts_per_mshr=20 162trace_addr=0 163two_queue=false 164write_buffers=8 165cpu_side=system.cpu0.dcache_port 166mem_side=system.toL2Bus.slave[1] 167 168[system.cpu0.dtb] 169type=AlphaTLB 170size=64 171 172[system.cpu0.fuPool] 173type=FUPool 174children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 175FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8 176 177[system.cpu0.fuPool.FUList0] 178type=FUDesc 179children=opList 180count=6 181opList=system.cpu0.fuPool.FUList0.opList 182 183[system.cpu0.fuPool.FUList0.opList] 184type=OpDesc 185issueLat=1 186opClass=IntAlu 187opLat=1 188 189[system.cpu0.fuPool.FUList1] 190type=FUDesc 191children=opList0 opList1 192count=2 193opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 194 195[system.cpu0.fuPool.FUList1.opList0] 196type=OpDesc 197issueLat=1 198opClass=IntMult 199opLat=3 200 201[system.cpu0.fuPool.FUList1.opList1] 202type=OpDesc 203issueLat=19 204opClass=IntDiv 205opLat=20 206 207[system.cpu0.fuPool.FUList2] 208type=FUDesc 209children=opList0 opList1 opList2 210count=4 211opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2 212 213[system.cpu0.fuPool.FUList2.opList0] 214type=OpDesc 215issueLat=1 216opClass=FloatAdd 217opLat=2 218 219[system.cpu0.fuPool.FUList2.opList1] 220type=OpDesc 221issueLat=1 222opClass=FloatCmp 223opLat=2 224 225[system.cpu0.fuPool.FUList2.opList2] 226type=OpDesc 227issueLat=1 228opClass=FloatCvt 229opLat=2 230 231[system.cpu0.fuPool.FUList3] 232type=FUDesc 233children=opList0 opList1 opList2 234count=2 235opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 236 237[system.cpu0.fuPool.FUList3.opList0] 238type=OpDesc 239issueLat=1 240opClass=FloatMult 241opLat=4 242 243[system.cpu0.fuPool.FUList3.opList1] 244type=OpDesc 245issueLat=12 246opClass=FloatDiv 247opLat=12 248 249[system.cpu0.fuPool.FUList3.opList2] 250type=OpDesc 251issueLat=24 252opClass=FloatSqrt 253opLat=24 254 255[system.cpu0.fuPool.FUList4] 256type=FUDesc 257children=opList 258count=0 259opList=system.cpu0.fuPool.FUList4.opList 260 261[system.cpu0.fuPool.FUList4.opList] 262type=OpDesc 263issueLat=1 264opClass=MemRead 265opLat=1 266 267[system.cpu0.fuPool.FUList5] 268type=FUDesc 269children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 270count=4 271opList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19 272 273[system.cpu0.fuPool.FUList5.opList00] 274type=OpDesc 275issueLat=1 276opClass=SimdAdd 277opLat=1 278 279[system.cpu0.fuPool.FUList5.opList01] 280type=OpDesc 281issueLat=1 282opClass=SimdAddAcc 283opLat=1 284 285[system.cpu0.fuPool.FUList5.opList02] 286type=OpDesc 287issueLat=1 288opClass=SimdAlu 289opLat=1 290 291[system.cpu0.fuPool.FUList5.opList03] 292type=OpDesc 293issueLat=1 294opClass=SimdCmp 295opLat=1 296 297[system.cpu0.fuPool.FUList5.opList04] 298type=OpDesc 299issueLat=1 300opClass=SimdCvt 301opLat=1 302 303[system.cpu0.fuPool.FUList5.opList05] 304type=OpDesc 305issueLat=1 306opClass=SimdMisc 307opLat=1 308 309[system.cpu0.fuPool.FUList5.opList06] 310type=OpDesc 311issueLat=1 312opClass=SimdMult 313opLat=1 314 315[system.cpu0.fuPool.FUList5.opList07] 316type=OpDesc 317issueLat=1 318opClass=SimdMultAcc 319opLat=1 320 321[system.cpu0.fuPool.FUList5.opList08] 322type=OpDesc 323issueLat=1 324opClass=SimdShift 325opLat=1 326 327[system.cpu0.fuPool.FUList5.opList09] 328type=OpDesc 329issueLat=1 330opClass=SimdShiftAcc 331opLat=1 332 333[system.cpu0.fuPool.FUList5.opList10] 334type=OpDesc 335issueLat=1 336opClass=SimdSqrt 337opLat=1 338 339[system.cpu0.fuPool.FUList5.opList11] 340type=OpDesc 341issueLat=1 342opClass=SimdFloatAdd 343opLat=1 344 345[system.cpu0.fuPool.FUList5.opList12] 346type=OpDesc 347issueLat=1 348opClass=SimdFloatAlu 349opLat=1 350 351[system.cpu0.fuPool.FUList5.opList13] 352type=OpDesc 353issueLat=1 354opClass=SimdFloatCmp 355opLat=1 356 357[system.cpu0.fuPool.FUList5.opList14] 358type=OpDesc 359issueLat=1 360opClass=SimdFloatCvt 361opLat=1 362 363[system.cpu0.fuPool.FUList5.opList15] 364type=OpDesc 365issueLat=1 366opClass=SimdFloatDiv 367opLat=1 368 369[system.cpu0.fuPool.FUList5.opList16] 370type=OpDesc 371issueLat=1 372opClass=SimdFloatMisc 373opLat=1 374 375[system.cpu0.fuPool.FUList5.opList17] 376type=OpDesc 377issueLat=1 378opClass=SimdFloatMult 379opLat=1 380 381[system.cpu0.fuPool.FUList5.opList18] 382type=OpDesc 383issueLat=1 384opClass=SimdFloatMultAcc 385opLat=1 386 387[system.cpu0.fuPool.FUList5.opList19] 388type=OpDesc 389issueLat=1 390opClass=SimdFloatSqrt 391opLat=1 392 393[system.cpu0.fuPool.FUList6] 394type=FUDesc 395children=opList 396count=0 397opList=system.cpu0.fuPool.FUList6.opList 398 399[system.cpu0.fuPool.FUList6.opList] 400type=OpDesc 401issueLat=1 402opClass=MemWrite 403opLat=1 404 405[system.cpu0.fuPool.FUList7] 406type=FUDesc 407children=opList0 opList1 408count=4 409opList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 410 411[system.cpu0.fuPool.FUList7.opList0] 412type=OpDesc 413issueLat=1 414opClass=MemRead 415opLat=1 416 417[system.cpu0.fuPool.FUList7.opList1] 418type=OpDesc 419issueLat=1 420opClass=MemWrite 421opLat=1 422 423[system.cpu0.fuPool.FUList8] 424type=FUDesc 425children=opList 426count=1 427opList=system.cpu0.fuPool.FUList8.opList 428 429[system.cpu0.fuPool.FUList8.opList] 430type=OpDesc 431issueLat=3 432opClass=IprAccess 433opLat=3 434 435[system.cpu0.icache] 436type=BaseCache 437addr_ranges=0:18446744073709551615 438assoc=1 439block_size=64 440forward_snoops=true 441hash_delay=1 442is_top_level=true 443latency=1000 444max_miss_count=0 445mshrs=4 446prefetch_on_access=false 447prefetcher=Null 448prioritizeRequests=false 449repl=Null 450size=32768 451subblock_size=0 452system=system 453tgts_per_mshr=20 454trace_addr=0 455two_queue=false 456write_buffers=8 457cpu_side=system.cpu0.icache_port 458mem_side=system.toL2Bus.slave[0] 459 460[system.cpu0.interrupts] 461type=AlphaInterrupts 462 463[system.cpu0.itb] 464type=AlphaTLB 465size=48 466 467[system.cpu0.tracer] 468type=ExeTracer 469 470[system.cpu1] 471type=DerivO3CPU 472children=dcache dtb fuPool icache interrupts itb tracer 473BTBEntries=4096 474BTBTagSize=16 475LFSTSize=1024 476LQEntries=32 477LSQCheckLoads=true 478LSQDepCheckShift=4 479RASSize=16 480SQEntries=32 481SSITSize=1024 482activity=0 483backComSize=5 484cachePorts=200 485checker=Null 486choiceCtrBits=2 487choicePredictorSize=8192 488clock=500 489commitToDecodeDelay=1 490commitToFetchDelay=1 491commitToIEWDelay=1 492commitToRenameDelay=1 493commitWidth=8 494cpu_id=1 495decodeToFetchDelay=1 496decodeToRenameDelay=1 497decodeWidth=8 498defer_registration=false 499dispatchWidth=8 500do_checkpoint_insts=true 501do_quiesce=true 502do_statistics_insts=true 503dtb=system.cpu1.dtb 504fetchToDecodeDelay=1 505fetchTrapLatency=1 506fetchWidth=8 507forwardComSize=5 508fuPool=system.cpu1.fuPool 509function_trace=false 510function_trace_start=0 511globalCtrBits=2 512globalHistoryBits=13 513globalPredictorSize=8192 514iewToCommitDelay=1 515iewToDecodeDelay=1 516iewToFetchDelay=1 517iewToRenameDelay=1 518instShiftAmt=2 519interrupts=system.cpu1.interrupts 520issueToExecuteDelay=1 521issueWidth=8 522itb=system.cpu1.itb 523localCtrBits=2 524localHistoryBits=11 525localHistoryTableSize=2048 526localPredictorSize=2048 527max_insts_all_threads=0 528max_insts_any_thread=0 529max_loads_all_threads=0 530max_loads_any_thread=0 531needsTSO=false 532numIQEntries=64 533numPhysFloatRegs=256 534numPhysIntRegs=256 535numROBEntries=192 536numRobs=1 537numThreads=1 538phase=0 539predType=tournament 540profile=0 541progress_interval=0 542renameToDecodeDelay=1 543renameToFetchDelay=1 544renameToIEWDelay=2 545renameToROBDelay=1 546renameWidth=8 547smtCommitPolicy=RoundRobin 548smtFetchPolicy=SingleThread 549smtIQPolicy=Partitioned 550smtIQThreshold=100 551smtLSQPolicy=Partitioned 552smtLSQThreshold=100 553smtNumFetchingThreads=1 554smtROBPolicy=Partitioned 555smtROBThreshold=100 556squashWidth=8 557store_set_clear_period=250000 558system=system 559tracer=system.cpu1.tracer 560trapLatency=13 561wbDepth=1 562wbWidth=8 563workload= 564dcache_port=system.cpu1.dcache.cpu_side 565icache_port=system.cpu1.icache.cpu_side 566 567[system.cpu1.dcache] 568type=BaseCache 569addr_ranges=0:18446744073709551615 570assoc=4 571block_size=64 572forward_snoops=true 573hash_delay=1 574is_top_level=true 575latency=1000 576max_miss_count=0 577mshrs=4 578prefetch_on_access=false 579prefetcher=Null 580prioritizeRequests=false 581repl=Null 582size=32768 583subblock_size=0 584system=system 585tgts_per_mshr=20 586trace_addr=0 587two_queue=false 588write_buffers=8 589cpu_side=system.cpu1.dcache_port 590mem_side=system.toL2Bus.slave[3] 591 592[system.cpu1.dtb] 593type=AlphaTLB 594size=64 595 596[system.cpu1.fuPool] 597type=FUPool 598children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 599FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8 600 601[system.cpu1.fuPool.FUList0] 602type=FUDesc 603children=opList 604count=6 605opList=system.cpu1.fuPool.FUList0.opList 606 607[system.cpu1.fuPool.FUList0.opList] 608type=OpDesc 609issueLat=1 610opClass=IntAlu 611opLat=1 612 613[system.cpu1.fuPool.FUList1] 614type=FUDesc 615children=opList0 opList1 616count=2 617opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 618 619[system.cpu1.fuPool.FUList1.opList0] 620type=OpDesc 621issueLat=1 622opClass=IntMult 623opLat=3 624 625[system.cpu1.fuPool.FUList1.opList1] 626type=OpDesc 627issueLat=19 628opClass=IntDiv 629opLat=20 630 631[system.cpu1.fuPool.FUList2] 632type=FUDesc 633children=opList0 opList1 opList2 634count=4 635opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2 636 637[system.cpu1.fuPool.FUList2.opList0] 638type=OpDesc 639issueLat=1 640opClass=FloatAdd 641opLat=2 642 643[system.cpu1.fuPool.FUList2.opList1] 644type=OpDesc 645issueLat=1 646opClass=FloatCmp 647opLat=2 648 649[system.cpu1.fuPool.FUList2.opList2] 650type=OpDesc 651issueLat=1 652opClass=FloatCvt 653opLat=2 654 655[system.cpu1.fuPool.FUList3] 656type=FUDesc 657children=opList0 opList1 opList2 658count=2 659opList=system.cpu1.fuPool.FUList3.opList0 system.cpu1.fuPool.FUList3.opList1 system.cpu1.fuPool.FUList3.opList2 660 661[system.cpu1.fuPool.FUList3.opList0] 662type=OpDesc 663issueLat=1 664opClass=FloatMult 665opLat=4 666 667[system.cpu1.fuPool.FUList3.opList1] 668type=OpDesc 669issueLat=12 670opClass=FloatDiv 671opLat=12 672 673[system.cpu1.fuPool.FUList3.opList2] 674type=OpDesc 675issueLat=24 676opClass=FloatSqrt 677opLat=24 678 679[system.cpu1.fuPool.FUList4] 680type=FUDesc 681children=opList 682count=0 683opList=system.cpu1.fuPool.FUList4.opList 684 685[system.cpu1.fuPool.FUList4.opList] 686type=OpDesc 687issueLat=1 688opClass=MemRead 689opLat=1 690 691[system.cpu1.fuPool.FUList5] 692type=FUDesc 693children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 694count=4 695opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19 696 697[system.cpu1.fuPool.FUList5.opList00] 698type=OpDesc 699issueLat=1 700opClass=SimdAdd 701opLat=1 702 703[system.cpu1.fuPool.FUList5.opList01] 704type=OpDesc 705issueLat=1 706opClass=SimdAddAcc 707opLat=1 708 709[system.cpu1.fuPool.FUList5.opList02] 710type=OpDesc 711issueLat=1 712opClass=SimdAlu 713opLat=1 714 715[system.cpu1.fuPool.FUList5.opList03] 716type=OpDesc 717issueLat=1 718opClass=SimdCmp 719opLat=1 720 721[system.cpu1.fuPool.FUList5.opList04] 722type=OpDesc 723issueLat=1 724opClass=SimdCvt 725opLat=1 726 727[system.cpu1.fuPool.FUList5.opList05] 728type=OpDesc 729issueLat=1 730opClass=SimdMisc 731opLat=1 732 733[system.cpu1.fuPool.FUList5.opList06] 734type=OpDesc 735issueLat=1 736opClass=SimdMult 737opLat=1 738 739[system.cpu1.fuPool.FUList5.opList07] 740type=OpDesc 741issueLat=1 742opClass=SimdMultAcc 743opLat=1 744 745[system.cpu1.fuPool.FUList5.opList08] 746type=OpDesc 747issueLat=1 748opClass=SimdShift 749opLat=1 750 751[system.cpu1.fuPool.FUList5.opList09] 752type=OpDesc 753issueLat=1 754opClass=SimdShiftAcc 755opLat=1 756 757[system.cpu1.fuPool.FUList5.opList10] 758type=OpDesc 759issueLat=1 760opClass=SimdSqrt 761opLat=1 762 763[system.cpu1.fuPool.FUList5.opList11] 764type=OpDesc 765issueLat=1 766opClass=SimdFloatAdd 767opLat=1 768 769[system.cpu1.fuPool.FUList5.opList12] 770type=OpDesc 771issueLat=1 772opClass=SimdFloatAlu 773opLat=1 774 775[system.cpu1.fuPool.FUList5.opList13] 776type=OpDesc 777issueLat=1 778opClass=SimdFloatCmp 779opLat=1 780 781[system.cpu1.fuPool.FUList5.opList14] 782type=OpDesc 783issueLat=1 784opClass=SimdFloatCvt 785opLat=1 786 787[system.cpu1.fuPool.FUList5.opList15] 788type=OpDesc 789issueLat=1 790opClass=SimdFloatDiv 791opLat=1 792 793[system.cpu1.fuPool.FUList5.opList16] 794type=OpDesc 795issueLat=1 796opClass=SimdFloatMisc 797opLat=1 798 799[system.cpu1.fuPool.FUList5.opList17] 800type=OpDesc 801issueLat=1 802opClass=SimdFloatMult 803opLat=1 804 805[system.cpu1.fuPool.FUList5.opList18] 806type=OpDesc 807issueLat=1 808opClass=SimdFloatMultAcc 809opLat=1 810 811[system.cpu1.fuPool.FUList5.opList19] 812type=OpDesc 813issueLat=1 814opClass=SimdFloatSqrt 815opLat=1 816 817[system.cpu1.fuPool.FUList6] 818type=FUDesc 819children=opList 820count=0 821opList=system.cpu1.fuPool.FUList6.opList 822 823[system.cpu1.fuPool.FUList6.opList] 824type=OpDesc 825issueLat=1 826opClass=MemWrite 827opLat=1 828 829[system.cpu1.fuPool.FUList7] 830type=FUDesc 831children=opList0 opList1 832count=4 833opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 834 835[system.cpu1.fuPool.FUList7.opList0] 836type=OpDesc 837issueLat=1 838opClass=MemRead 839opLat=1 840 841[system.cpu1.fuPool.FUList7.opList1] 842type=OpDesc 843issueLat=1 844opClass=MemWrite 845opLat=1 846 847[system.cpu1.fuPool.FUList8] 848type=FUDesc 849children=opList 850count=1 851opList=system.cpu1.fuPool.FUList8.opList 852 853[system.cpu1.fuPool.FUList8.opList] 854type=OpDesc 855issueLat=3 856opClass=IprAccess 857opLat=3 858 859[system.cpu1.icache] 860type=BaseCache 861addr_ranges=0:18446744073709551615 862assoc=1 863block_size=64 864forward_snoops=true 865hash_delay=1 866is_top_level=true 867latency=1000 868max_miss_count=0 869mshrs=4 870prefetch_on_access=false 871prefetcher=Null 872prioritizeRequests=false 873repl=Null 874size=32768 875subblock_size=0 876system=system 877tgts_per_mshr=20 878trace_addr=0 879two_queue=false 880write_buffers=8 881cpu_side=system.cpu1.icache_port 882mem_side=system.toL2Bus.slave[2] 883 884[system.cpu1.interrupts] 885type=AlphaInterrupts 886 887[system.cpu1.itb] 888type=AlphaTLB 889size=48 890 891[system.cpu1.tracer] 892type=ExeTracer 893 894[system.disk0] 895type=IdeDisk 896children=image 897delay=1000000 898driveID=master 899image=system.disk0.image 900 901[system.disk0.image] 902type=CowDiskImage 903children=child 904child=system.disk0.image.child 905image_file= 906read_only=false 907table_size=65536 908 909[system.disk0.image.child] 910type=RawDiskImage 911image_file=/dist/m5/system/disks/linux-latest.img 912read_only=true 913 914[system.disk2] 915type=IdeDisk 916children=image 917delay=1000000 918driveID=master 919image=system.disk2.image 920 921[system.disk2.image] 922type=CowDiskImage 923children=child 924child=system.disk2.image.child 925image_file= 926read_only=false 927table_size=65536 928 929[system.disk2.image.child] 930type=RawDiskImage 931image_file=/dist/m5/system/disks/linux-bigswap2.img 932read_only=true 933 934[system.intrctrl] 935type=IntrControl 936sys=system 937 938[system.iobus] 939type=NoncoherentBus 940block_size=64 941clock=1000 942header_cycles=1 943use_default_range=true 944width=8 945default=system.tsunami.pciconfig.pio 946master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 947slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 948 949[system.iocache] 950type=BaseCache 951addr_ranges=0:8589934591 952assoc=8 953block_size=64 954forward_snoops=false 955hash_delay=1 956is_top_level=true 957latency=50000 958max_miss_count=0 959mshrs=20 960prefetch_on_access=false 961prefetcher=Null 962prioritizeRequests=false 963repl=Null 964size=1024 965subblock_size=0 966system=system 967tgts_per_mshr=12 968trace_addr=0 969two_queue=false 970write_buffers=8 971cpu_side=system.iobus.master[29] 972mem_side=system.membus.slave[1] 973 974[system.l2c] 975type=BaseCache 976addr_ranges=0:18446744073709551615 977assoc=8 978block_size=64 979forward_snoops=true 980hash_delay=1 981is_top_level=false 982latency=10000 983max_miss_count=0 984mshrs=92 985prefetch_on_access=false 986prefetcher=Null 987prioritizeRequests=false 988repl=Null 989size=4194304 990subblock_size=0 991system=system 992tgts_per_mshr=16 993trace_addr=0 994two_queue=false 995write_buffers=8 996cpu_side=system.toL2Bus.master[0] 997mem_side=system.membus.slave[2] 998 999[system.membus] 1000type=CoherentBus 1001children=badaddr_responder 1002block_size=64 1003clock=1000 1004header_cycles=1 1005use_default_range=false 1006width=8 1007default=system.membus.badaddr_responder.pio 1008master=system.bridge.slave system.physmem.port 1009slave=system.system_port system.iocache.mem_side system.l2c.mem_side 1010 1011[system.membus.badaddr_responder] 1012type=IsaFake 1013fake_mem=false 1014pio_addr=0 1015pio_latency=1000 1016pio_size=8 1017ret_bad_addr=true 1018ret_data16=65535 1019ret_data32=4294967295 1020ret_data64=18446744073709551615 1021ret_data8=255 1022system=system 1023update_data=false 1024warn_access= 1025pio=system.membus.default 1026 1027[system.physmem] 1028type=SimpleMemory 1029conf_table_reported=false 1030file= 1031in_addr_map=true 1032latency=30000 1033latency_var=0 1034null=false 1035range=0:134217727 1036zero=false 1037port=system.membus.master[1] 1038 1039[system.simple_disk] 1040type=SimpleDisk 1041children=disk 1042disk=system.simple_disk.disk 1043system=system 1044 1045[system.simple_disk.disk] 1046type=RawDiskImage 1047image_file=/dist/m5/system/disks/linux-latest.img 1048read_only=true 1049 1050[system.terminal] 1051type=Terminal 1052intr_control=system.intrctrl 1053number=0 1054output=true 1055port=3456 1056 1057[system.toL2Bus] 1058type=CoherentBus 1059block_size=64 1060clock=1000 1061header_cycles=1 1062use_default_range=false 1063width=8 1064master=system.l2c.cpu_side 1065slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 1066 1067[system.tsunami] 1068type=Tsunami 1069children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 1070intrctrl=system.intrctrl 1071system=system 1072 1073[system.tsunami.backdoor] 1074type=AlphaBackdoor 1075cpu=system.cpu0 1076disk=system.simple_disk 1077pio_addr=8804682956800 1078pio_latency=1000 1079platform=system.tsunami 1080system=system 1081terminal=system.terminal 1082pio=system.iobus.master[24] 1083 1084[system.tsunami.cchip] 1085type=TsunamiCChip 1086pio_addr=8803072344064 1087pio_latency=1000 1088system=system 1089tsunami=system.tsunami 1090pio=system.iobus.master[0] 1091 1092[system.tsunami.ethernet] 1093type=NSGigE 1094BAR0=1 1095BAR0LegacyIO=false 1096BAR0Size=256 1097BAR1=0 1098BAR1LegacyIO=false 1099BAR1Size=4096 1100BAR2=0 1101BAR2LegacyIO=false 1102BAR2Size=0 1103BAR3=0 1104BAR3LegacyIO=false 1105BAR3Size=0 1106BAR4=0 1107BAR4LegacyIO=false 1108BAR4Size=0 1109BAR5=0 1110BAR5LegacyIO=false 1111BAR5Size=0 1112BIST=0 1113CacheLineSize=0 1114CardbusCIS=0 1115ClassCode=2 1116Command=0 1117DeviceID=34 1118ExpansionROM=0 1119HeaderType=0 1120InterruptLine=30 1121InterruptPin=1 1122LatencyTimer=0 1123MaximumLatency=52 1124MinimumGrant=176 1125ProgIF=0 1126Revision=0 1127Status=656 1128SubClassCode=0 1129SubsystemID=0 1130SubsystemVendorID=0 1131VendorID=4107 1132clock=0 1133config_latency=20000 1134dma_data_free=false 1135dma_desc_free=false 1136dma_no_allocate=true 1137dma_read_delay=0 1138dma_read_factor=0 1139dma_write_delay=0 1140dma_write_factor=0 1141hardware_address=00:90:00:00:00:01 1142intr_delay=10000000 1143max_backoff_delay=10000000 1144min_backoff_delay=4000 1145pci_bus=0 1146pci_dev=1 1147pci_func=0 1148pio_latency=1000 1149platform=system.tsunami 1150rss=false 1151rx_delay=1000000 1152rx_fifo_size=524288 1153rx_filter=true 1154rx_thread=false 1155system=system 1156tx_delay=1000000 1157tx_fifo_size=524288 1158tx_thread=false 1159config=system.iobus.master[28] 1160dma=system.iobus.slave[2] 1161pio=system.iobus.master[27] 1162 1163[system.tsunami.fake_OROM] 1164type=IsaFake 1165fake_mem=false 1166pio_addr=8796093677568 1167pio_latency=1000 1168pio_size=393216 1169ret_bad_addr=false 1170ret_data16=65535 1171ret_data32=4294967295 1172ret_data64=18446744073709551615 1173ret_data8=255 1174system=system 1175update_data=false 1176warn_access= 1177pio=system.iobus.master[8] 1178 1179[system.tsunami.fake_ata0] 1180type=IsaFake 1181fake_mem=false 1182pio_addr=8804615848432 1183pio_latency=1000 1184pio_size=8 1185ret_bad_addr=false 1186ret_data16=65535 1187ret_data32=4294967295 1188ret_data64=18446744073709551615 1189ret_data8=255 1190system=system 1191update_data=false 1192warn_access= 1193pio=system.iobus.master[19] 1194 1195[system.tsunami.fake_ata1] 1196type=IsaFake 1197fake_mem=false 1198pio_addr=8804615848304 1199pio_latency=1000 1200pio_size=8 1201ret_bad_addr=false 1202ret_data16=65535 1203ret_data32=4294967295 1204ret_data64=18446744073709551615 1205ret_data8=255 1206system=system 1207update_data=false 1208warn_access= 1209pio=system.iobus.master[20] 1210 1211[system.tsunami.fake_pnp_addr] 1212type=IsaFake 1213fake_mem=false 1214pio_addr=8804615848569 1215pio_latency=1000 1216pio_size=8 1217ret_bad_addr=false 1218ret_data16=65535 1219ret_data32=4294967295 1220ret_data64=18446744073709551615 1221ret_data8=255 1222system=system 1223update_data=false 1224warn_access= 1225pio=system.iobus.master[9] 1226 1227[system.tsunami.fake_pnp_read0] 1228type=IsaFake 1229fake_mem=false 1230pio_addr=8804615848451 1231pio_latency=1000 1232pio_size=8 1233ret_bad_addr=false 1234ret_data16=65535 1235ret_data32=4294967295 1236ret_data64=18446744073709551615 1237ret_data8=255 1238system=system 1239update_data=false 1240warn_access= 1241pio=system.iobus.master[11] 1242 1243[system.tsunami.fake_pnp_read1] 1244type=IsaFake 1245fake_mem=false 1246pio_addr=8804615848515 1247pio_latency=1000 1248pio_size=8 1249ret_bad_addr=false 1250ret_data16=65535 1251ret_data32=4294967295 1252ret_data64=18446744073709551615 1253ret_data8=255 1254system=system 1255update_data=false 1256warn_access= 1257pio=system.iobus.master[12] 1258 1259[system.tsunami.fake_pnp_read2] 1260type=IsaFake 1261fake_mem=false 1262pio_addr=8804615848579 1263pio_latency=1000 1264pio_size=8 1265ret_bad_addr=false 1266ret_data16=65535 1267ret_data32=4294967295 1268ret_data64=18446744073709551615 1269ret_data8=255 1270system=system 1271update_data=false 1272warn_access= 1273pio=system.iobus.master[13] 1274 1275[system.tsunami.fake_pnp_read3] 1276type=IsaFake 1277fake_mem=false 1278pio_addr=8804615848643 1279pio_latency=1000 1280pio_size=8 1281ret_bad_addr=false 1282ret_data16=65535 1283ret_data32=4294967295 1284ret_data64=18446744073709551615 1285ret_data8=255 1286system=system 1287update_data=false 1288warn_access= 1289pio=system.iobus.master[14] 1290 1291[system.tsunami.fake_pnp_read4] 1292type=IsaFake 1293fake_mem=false 1294pio_addr=8804615848707 1295pio_latency=1000 1296pio_size=8 1297ret_bad_addr=false 1298ret_data16=65535 1299ret_data32=4294967295 1300ret_data64=18446744073709551615 1301ret_data8=255 1302system=system 1303update_data=false 1304warn_access= 1305pio=system.iobus.master[15] 1306 1307[system.tsunami.fake_pnp_read5] 1308type=IsaFake 1309fake_mem=false 1310pio_addr=8804615848771 1311pio_latency=1000 1312pio_size=8 1313ret_bad_addr=false 1314ret_data16=65535 1315ret_data32=4294967295 1316ret_data64=18446744073709551615 1317ret_data8=255 1318system=system 1319update_data=false 1320warn_access= 1321pio=system.iobus.master[16] 1322 1323[system.tsunami.fake_pnp_read6] 1324type=IsaFake 1325fake_mem=false 1326pio_addr=8804615848835 1327pio_latency=1000 1328pio_size=8 1329ret_bad_addr=false 1330ret_data16=65535 1331ret_data32=4294967295 1332ret_data64=18446744073709551615 1333ret_data8=255 1334system=system 1335update_data=false 1336warn_access= 1337pio=system.iobus.master[17] 1338 1339[system.tsunami.fake_pnp_read7] 1340type=IsaFake 1341fake_mem=false 1342pio_addr=8804615848899 1343pio_latency=1000 1344pio_size=8 1345ret_bad_addr=false 1346ret_data16=65535 1347ret_data32=4294967295 1348ret_data64=18446744073709551615 1349ret_data8=255 1350system=system 1351update_data=false 1352warn_access= 1353pio=system.iobus.master[18] 1354 1355[system.tsunami.fake_pnp_write] 1356type=IsaFake 1357fake_mem=false 1358pio_addr=8804615850617 1359pio_latency=1000 1360pio_size=8 1361ret_bad_addr=false 1362ret_data16=65535 1363ret_data32=4294967295 1364ret_data64=18446744073709551615 1365ret_data8=255 1366system=system 1367update_data=false 1368warn_access= 1369pio=system.iobus.master[10] 1370 1371[system.tsunami.fake_ppc] 1372type=IsaFake 1373fake_mem=false 1374pio_addr=8804615848891 1375pio_latency=1000 1376pio_size=8 1377ret_bad_addr=false 1378ret_data16=65535 1379ret_data32=4294967295 1380ret_data64=18446744073709551615 1381ret_data8=255 1382system=system 1383update_data=false 1384warn_access= 1385pio=system.iobus.master[7] 1386 1387[system.tsunami.fake_sm_chip] 1388type=IsaFake 1389fake_mem=false 1390pio_addr=8804615848816 1391pio_latency=1000 1392pio_size=8 1393ret_bad_addr=false 1394ret_data16=65535 1395ret_data32=4294967295 1396ret_data64=18446744073709551615 1397ret_data8=255 1398system=system 1399update_data=false 1400warn_access= 1401pio=system.iobus.master[2] 1402 1403[system.tsunami.fake_uart1] 1404type=IsaFake 1405fake_mem=false 1406pio_addr=8804615848696 1407pio_latency=1000 1408pio_size=8 1409ret_bad_addr=false 1410ret_data16=65535 1411ret_data32=4294967295 1412ret_data64=18446744073709551615 1413ret_data8=255 1414system=system 1415update_data=false 1416warn_access= 1417pio=system.iobus.master[3] 1418 1419[system.tsunami.fake_uart2] 1420type=IsaFake 1421fake_mem=false 1422pio_addr=8804615848936 1423pio_latency=1000 1424pio_size=8 1425ret_bad_addr=false 1426ret_data16=65535 1427ret_data32=4294967295 1428ret_data64=18446744073709551615 1429ret_data8=255 1430system=system 1431update_data=false 1432warn_access= 1433pio=system.iobus.master[4] 1434 1435[system.tsunami.fake_uart3] 1436type=IsaFake 1437fake_mem=false 1438pio_addr=8804615848680 1439pio_latency=1000 1440pio_size=8 1441ret_bad_addr=false 1442ret_data16=65535 1443ret_data32=4294967295 1444ret_data64=18446744073709551615 1445ret_data8=255 1446system=system 1447update_data=false 1448warn_access= 1449pio=system.iobus.master[5] 1450 1451[system.tsunami.fake_uart4] 1452type=IsaFake 1453fake_mem=false 1454pio_addr=8804615848944 1455pio_latency=1000 1456pio_size=8 1457ret_bad_addr=false 1458ret_data16=65535 1459ret_data32=4294967295 1460ret_data64=18446744073709551615 1461ret_data8=255 1462system=system 1463update_data=false 1464warn_access= 1465pio=system.iobus.master[6] 1466 1467[system.tsunami.fb] 1468type=BadDevice 1469devicename=FrameBuffer 1470pio_addr=8804615848912 1471pio_latency=1000 1472system=system 1473pio=system.iobus.master[21] 1474 1475[system.tsunami.ide] 1476type=IdeController 1477BAR0=1 1478BAR0LegacyIO=false 1479BAR0Size=8 1480BAR1=1 1481BAR1LegacyIO=false 1482BAR1Size=4 1483BAR2=1 1484BAR2LegacyIO=false 1485BAR2Size=8 1486BAR3=1 1487BAR3LegacyIO=false 1488BAR3Size=4 1489BAR4=1 1490BAR4LegacyIO=false 1491BAR4Size=16 1492BAR5=1 1493BAR5LegacyIO=false 1494BAR5Size=0 1495BIST=0 1496CacheLineSize=0 1497CardbusCIS=0 1498ClassCode=1 1499Command=0 1500DeviceID=28945 1501ExpansionROM=0 1502HeaderType=0 1503InterruptLine=31 1504InterruptPin=1 1505LatencyTimer=0 1506MaximumLatency=0 1507MinimumGrant=0 1508ProgIF=133 1509Revision=0 1510Status=640 1511SubClassCode=1 1512SubsystemID=0 1513SubsystemVendorID=0 1514VendorID=32902 1515config_latency=20000 1516ctrl_offset=0 1517disks=system.disk0 system.disk2 1518io_shift=0 1519max_backoff_delay=10000000 1520min_backoff_delay=4000 1521pci_bus=0 1522pci_dev=0 1523pci_func=0 1524pio_latency=1000 1525platform=system.tsunami 1526system=system 1527config=system.iobus.master[26] 1528dma=system.iobus.slave[1] 1529pio=system.iobus.master[25] 1530 1531[system.tsunami.io] 1532type=TsunamiIO 1533frequency=976562500 1534pio_addr=8804615847936 1535pio_latency=1000 1536system=system 1537time=Thu Jan 1 00:00:00 2009 1538tsunami=system.tsunami 1539year_is_bcd=false 1540pio=system.iobus.master[22] 1541 1542[system.tsunami.pchip] 1543type=TsunamiPChip 1544pio_addr=8802535473152 1545pio_latency=1000 1546system=system 1547tsunami=system.tsunami 1548pio=system.iobus.master[1] 1549 1550[system.tsunami.pciconfig] 1551type=PciConfigAll 1552bus=0 1553pio_latency=1 1554platform=system.tsunami 1555size=16777216 1556system=system 1557pio=system.iobus.default 1558 1559[system.tsunami.uart] 1560type=Uart8250 1561pio_addr=8804615848952 1562pio_latency=1000 1563platform=system.tsunami 1564system=system 1565terminal=system.terminal 1566pio=system.iobus.master[23] 1567 1568