config.ini revision 11245:1c5102c0a7a9
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain 18console=/work/gem5/dist/binaries/console 19eventq_index=0 20init_param=0 21kernel=/work/gem5/dist/binaries/vmlinux 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 31pal=/work/gem5/dist/binaries/ts_osfpal 32readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh 33symbolfile= 34system_rev=1024 35system_type=34 36work_begin_ckpt_count=0 37work_begin_cpu_id_exit=-1 38work_begin_exit_count=0 39work_cpus_ckpt_count=0 40work_end_ckpt_count=0 41work_end_exit_count=0 42work_item_id=-1 43system_port=system.membus.slave[0] 44 45[system.bridge] 46type=Bridge 47clk_domain=system.clk_domain 48delay=50000 49eventq_index=0 50ranges=8796093022208:18446744073709551615 51req_size=16 52resp_size=16 53master=system.iobus.slave[0] 54slave=system.membus.master[0] 55 56[system.clk_domain] 57type=SrcClockDomain 58clock=1000 59domain_id=-1 60eventq_index=0 61init_perf_level=0 62voltage_domain=system.voltage_domain 63 64[system.cpu0] 65type=DerivO3CPU 66children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 67LFSTSize=1024 68LQEntries=32 69LSQCheckLoads=true 70LSQDepCheckShift=4 71SQEntries=32 72SSITSize=1024 73activity=0 74backComSize=5 75branchPred=system.cpu0.branchPred 76cachePorts=200 77checker=Null 78clk_domain=system.cpu_clk_domain 79commitToDecodeDelay=1 80commitToFetchDelay=1 81commitToIEWDelay=1 82commitToRenameDelay=1 83commitWidth=8 84cpu_id=0 85decodeToFetchDelay=1 86decodeToRenameDelay=1 87decodeWidth=8 88dispatchWidth=8 89do_checkpoint_insts=true 90do_quiesce=true 91do_statistics_insts=true 92dtb=system.cpu0.dtb 93eventq_index=0 94fetchBufferSize=64 95fetchQueueSize=32 96fetchToDecodeDelay=1 97fetchTrapLatency=1 98fetchWidth=8 99forwardComSize=5 100fuPool=system.cpu0.fuPool 101function_trace=false 102function_trace_start=0 103iewToCommitDelay=1 104iewToDecodeDelay=1 105iewToFetchDelay=1 106iewToRenameDelay=1 107interrupts=system.cpu0.interrupts 108isa=system.cpu0.isa 109issueToExecuteDelay=1 110issueWidth=8 111itb=system.cpu0.itb 112max_insts_all_threads=0 113max_insts_any_thread=0 114max_loads_all_threads=0 115max_loads_any_thread=0 116needsTSO=false 117numIQEntries=64 118numPhysCCRegs=0 119numPhysFloatRegs=256 120numPhysIntRegs=256 121numROBEntries=192 122numRobs=1 123numThreads=1 124profile=0 125progress_interval=0 126renameToDecodeDelay=1 127renameToFetchDelay=1 128renameToIEWDelay=2 129renameToROBDelay=1 130renameWidth=8 131simpoint_start_insts= 132smtCommitPolicy=RoundRobin 133smtFetchPolicy=SingleThread 134smtIQPolicy=Partitioned 135smtIQThreshold=100 136smtLSQPolicy=Partitioned 137smtLSQThreshold=100 138smtNumFetchingThreads=1 139smtROBPolicy=Partitioned 140smtROBThreshold=100 141socket_id=0 142squashWidth=8 143store_set_clear_period=250000 144switched_out=false 145system=system 146tracer=system.cpu0.tracer 147trapLatency=13 148wbWidth=8 149workload= 150dcache_port=system.cpu0.dcache.cpu_side 151icache_port=system.cpu0.icache.cpu_side 152 153[system.cpu0.branchPred] 154type=TournamentBP 155BTBEntries=4096 156BTBTagSize=16 157RASSize=16 158choiceCtrBits=2 159choicePredictorSize=8192 160eventq_index=0 161globalCtrBits=2 162globalPredictorSize=8192 163instShiftAmt=2 164localCtrBits=2 165localHistoryTableSize=2048 166localPredictorSize=2048 167numThreads=1 168 169[system.cpu0.dcache] 170type=Cache 171children=tags 172addr_ranges=0:18446744073709551615 173assoc=4 174clk_domain=system.cpu_clk_domain 175clusivity=mostly_incl 176demand_mshr_reserve=1 177eventq_index=0 178forward_snoops=true 179hit_latency=2 180is_read_only=false 181max_miss_count=0 182mshrs=4 183prefetch_on_access=false 184prefetcher=Null 185response_latency=2 186sequential_access=false 187size=32768 188system=system 189tags=system.cpu0.dcache.tags 190tgts_per_mshr=20 191write_buffers=8 192writeback_clean=false 193cpu_side=system.cpu0.dcache_port 194mem_side=system.toL2Bus.slave[1] 195 196[system.cpu0.dcache.tags] 197type=LRU 198assoc=4 199block_size=64 200clk_domain=system.cpu_clk_domain 201eventq_index=0 202hit_latency=2 203sequential_access=false 204size=32768 205 206[system.cpu0.dtb] 207type=AlphaTLB 208eventq_index=0 209size=64 210 211[system.cpu0.fuPool] 212type=FUPool 213children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 214FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 system.cpu0.fuPool.FUList5 system.cpu0.fuPool.FUList6 system.cpu0.fuPool.FUList7 system.cpu0.fuPool.FUList8 215eventq_index=0 216 217[system.cpu0.fuPool.FUList0] 218type=FUDesc 219children=opList 220count=6 221eventq_index=0 222opList=system.cpu0.fuPool.FUList0.opList 223 224[system.cpu0.fuPool.FUList0.opList] 225type=OpDesc 226eventq_index=0 227opClass=IntAlu 228opLat=1 229pipelined=true 230 231[system.cpu0.fuPool.FUList1] 232type=FUDesc 233children=opList0 opList1 234count=2 235eventq_index=0 236opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 237 238[system.cpu0.fuPool.FUList1.opList0] 239type=OpDesc 240eventq_index=0 241opClass=IntMult 242opLat=3 243pipelined=true 244 245[system.cpu0.fuPool.FUList1.opList1] 246type=OpDesc 247eventq_index=0 248opClass=IntDiv 249opLat=20 250pipelined=false 251 252[system.cpu0.fuPool.FUList2] 253type=FUDesc 254children=opList0 opList1 opList2 255count=4 256eventq_index=0 257opList=system.cpu0.fuPool.FUList2.opList0 system.cpu0.fuPool.FUList2.opList1 system.cpu0.fuPool.FUList2.opList2 258 259[system.cpu0.fuPool.FUList2.opList0] 260type=OpDesc 261eventq_index=0 262opClass=FloatAdd 263opLat=2 264pipelined=true 265 266[system.cpu0.fuPool.FUList2.opList1] 267type=OpDesc 268eventq_index=0 269opClass=FloatCmp 270opLat=2 271pipelined=true 272 273[system.cpu0.fuPool.FUList2.opList2] 274type=OpDesc 275eventq_index=0 276opClass=FloatCvt 277opLat=2 278pipelined=true 279 280[system.cpu0.fuPool.FUList3] 281type=FUDesc 282children=opList0 opList1 opList2 283count=2 284eventq_index=0 285opList=system.cpu0.fuPool.FUList3.opList0 system.cpu0.fuPool.FUList3.opList1 system.cpu0.fuPool.FUList3.opList2 286 287[system.cpu0.fuPool.FUList3.opList0] 288type=OpDesc 289eventq_index=0 290opClass=FloatMult 291opLat=4 292pipelined=true 293 294[system.cpu0.fuPool.FUList3.opList1] 295type=OpDesc 296eventq_index=0 297opClass=FloatDiv 298opLat=12 299pipelined=false 300 301[system.cpu0.fuPool.FUList3.opList2] 302type=OpDesc 303eventq_index=0 304opClass=FloatSqrt 305opLat=24 306pipelined=false 307 308[system.cpu0.fuPool.FUList4] 309type=FUDesc 310children=opList 311count=0 312eventq_index=0 313opList=system.cpu0.fuPool.FUList4.opList 314 315[system.cpu0.fuPool.FUList4.opList] 316type=OpDesc 317eventq_index=0 318opClass=MemRead 319opLat=1 320pipelined=true 321 322[system.cpu0.fuPool.FUList5] 323type=FUDesc 324children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 325count=4 326eventq_index=0 327opList=system.cpu0.fuPool.FUList5.opList00 system.cpu0.fuPool.FUList5.opList01 system.cpu0.fuPool.FUList5.opList02 system.cpu0.fuPool.FUList5.opList03 system.cpu0.fuPool.FUList5.opList04 system.cpu0.fuPool.FUList5.opList05 system.cpu0.fuPool.FUList5.opList06 system.cpu0.fuPool.FUList5.opList07 system.cpu0.fuPool.FUList5.opList08 system.cpu0.fuPool.FUList5.opList09 system.cpu0.fuPool.FUList5.opList10 system.cpu0.fuPool.FUList5.opList11 system.cpu0.fuPool.FUList5.opList12 system.cpu0.fuPool.FUList5.opList13 system.cpu0.fuPool.FUList5.opList14 system.cpu0.fuPool.FUList5.opList15 system.cpu0.fuPool.FUList5.opList16 system.cpu0.fuPool.FUList5.opList17 system.cpu0.fuPool.FUList5.opList18 system.cpu0.fuPool.FUList5.opList19 328 329[system.cpu0.fuPool.FUList5.opList00] 330type=OpDesc 331eventq_index=0 332opClass=SimdAdd 333opLat=1 334pipelined=true 335 336[system.cpu0.fuPool.FUList5.opList01] 337type=OpDesc 338eventq_index=0 339opClass=SimdAddAcc 340opLat=1 341pipelined=true 342 343[system.cpu0.fuPool.FUList5.opList02] 344type=OpDesc 345eventq_index=0 346opClass=SimdAlu 347opLat=1 348pipelined=true 349 350[system.cpu0.fuPool.FUList5.opList03] 351type=OpDesc 352eventq_index=0 353opClass=SimdCmp 354opLat=1 355pipelined=true 356 357[system.cpu0.fuPool.FUList5.opList04] 358type=OpDesc 359eventq_index=0 360opClass=SimdCvt 361opLat=1 362pipelined=true 363 364[system.cpu0.fuPool.FUList5.opList05] 365type=OpDesc 366eventq_index=0 367opClass=SimdMisc 368opLat=1 369pipelined=true 370 371[system.cpu0.fuPool.FUList5.opList06] 372type=OpDesc 373eventq_index=0 374opClass=SimdMult 375opLat=1 376pipelined=true 377 378[system.cpu0.fuPool.FUList5.opList07] 379type=OpDesc 380eventq_index=0 381opClass=SimdMultAcc 382opLat=1 383pipelined=true 384 385[system.cpu0.fuPool.FUList5.opList08] 386type=OpDesc 387eventq_index=0 388opClass=SimdShift 389opLat=1 390pipelined=true 391 392[system.cpu0.fuPool.FUList5.opList09] 393type=OpDesc 394eventq_index=0 395opClass=SimdShiftAcc 396opLat=1 397pipelined=true 398 399[system.cpu0.fuPool.FUList5.opList10] 400type=OpDesc 401eventq_index=0 402opClass=SimdSqrt 403opLat=1 404pipelined=true 405 406[system.cpu0.fuPool.FUList5.opList11] 407type=OpDesc 408eventq_index=0 409opClass=SimdFloatAdd 410opLat=1 411pipelined=true 412 413[system.cpu0.fuPool.FUList5.opList12] 414type=OpDesc 415eventq_index=0 416opClass=SimdFloatAlu 417opLat=1 418pipelined=true 419 420[system.cpu0.fuPool.FUList5.opList13] 421type=OpDesc 422eventq_index=0 423opClass=SimdFloatCmp 424opLat=1 425pipelined=true 426 427[system.cpu0.fuPool.FUList5.opList14] 428type=OpDesc 429eventq_index=0 430opClass=SimdFloatCvt 431opLat=1 432pipelined=true 433 434[system.cpu0.fuPool.FUList5.opList15] 435type=OpDesc 436eventq_index=0 437opClass=SimdFloatDiv 438opLat=1 439pipelined=true 440 441[system.cpu0.fuPool.FUList5.opList16] 442type=OpDesc 443eventq_index=0 444opClass=SimdFloatMisc 445opLat=1 446pipelined=true 447 448[system.cpu0.fuPool.FUList5.opList17] 449type=OpDesc 450eventq_index=0 451opClass=SimdFloatMult 452opLat=1 453pipelined=true 454 455[system.cpu0.fuPool.FUList5.opList18] 456type=OpDesc 457eventq_index=0 458opClass=SimdFloatMultAcc 459opLat=1 460pipelined=true 461 462[system.cpu0.fuPool.FUList5.opList19] 463type=OpDesc 464eventq_index=0 465opClass=SimdFloatSqrt 466opLat=1 467pipelined=true 468 469[system.cpu0.fuPool.FUList6] 470type=FUDesc 471children=opList 472count=0 473eventq_index=0 474opList=system.cpu0.fuPool.FUList6.opList 475 476[system.cpu0.fuPool.FUList6.opList] 477type=OpDesc 478eventq_index=0 479opClass=MemWrite 480opLat=1 481pipelined=true 482 483[system.cpu0.fuPool.FUList7] 484type=FUDesc 485children=opList0 opList1 486count=4 487eventq_index=0 488opList=system.cpu0.fuPool.FUList7.opList0 system.cpu0.fuPool.FUList7.opList1 489 490[system.cpu0.fuPool.FUList7.opList0] 491type=OpDesc 492eventq_index=0 493opClass=MemRead 494opLat=1 495pipelined=true 496 497[system.cpu0.fuPool.FUList7.opList1] 498type=OpDesc 499eventq_index=0 500opClass=MemWrite 501opLat=1 502pipelined=true 503 504[system.cpu0.fuPool.FUList8] 505type=FUDesc 506children=opList 507count=1 508eventq_index=0 509opList=system.cpu0.fuPool.FUList8.opList 510 511[system.cpu0.fuPool.FUList8.opList] 512type=OpDesc 513eventq_index=0 514opClass=IprAccess 515opLat=3 516pipelined=false 517 518[system.cpu0.icache] 519type=Cache 520children=tags 521addr_ranges=0:18446744073709551615 522assoc=1 523clk_domain=system.cpu_clk_domain 524clusivity=mostly_incl 525demand_mshr_reserve=1 526eventq_index=0 527forward_snoops=true 528hit_latency=2 529is_read_only=true 530max_miss_count=0 531mshrs=4 532prefetch_on_access=false 533prefetcher=Null 534response_latency=2 535sequential_access=false 536size=32768 537system=system 538tags=system.cpu0.icache.tags 539tgts_per_mshr=20 540write_buffers=8 541writeback_clean=true 542cpu_side=system.cpu0.icache_port 543mem_side=system.toL2Bus.slave[0] 544 545[system.cpu0.icache.tags] 546type=LRU 547assoc=1 548block_size=64 549clk_domain=system.cpu_clk_domain 550eventq_index=0 551hit_latency=2 552sequential_access=false 553size=32768 554 555[system.cpu0.interrupts] 556type=AlphaInterrupts 557eventq_index=0 558 559[system.cpu0.isa] 560type=AlphaISA 561eventq_index=0 562system=system 563 564[system.cpu0.itb] 565type=AlphaTLB 566eventq_index=0 567size=48 568 569[system.cpu0.tracer] 570type=ExeTracer 571eventq_index=0 572 573[system.cpu1] 574type=DerivO3CPU 575children=branchPred dcache dtb fuPool icache interrupts isa itb tracer 576LFSTSize=1024 577LQEntries=32 578LSQCheckLoads=true 579LSQDepCheckShift=4 580SQEntries=32 581SSITSize=1024 582activity=0 583backComSize=5 584branchPred=system.cpu1.branchPred 585cachePorts=200 586checker=Null 587clk_domain=system.cpu_clk_domain 588commitToDecodeDelay=1 589commitToFetchDelay=1 590commitToIEWDelay=1 591commitToRenameDelay=1 592commitWidth=8 593cpu_id=1 594decodeToFetchDelay=1 595decodeToRenameDelay=1 596decodeWidth=8 597dispatchWidth=8 598do_checkpoint_insts=true 599do_quiesce=true 600do_statistics_insts=true 601dtb=system.cpu1.dtb 602eventq_index=0 603fetchBufferSize=64 604fetchQueueSize=32 605fetchToDecodeDelay=1 606fetchTrapLatency=1 607fetchWidth=8 608forwardComSize=5 609fuPool=system.cpu1.fuPool 610function_trace=false 611function_trace_start=0 612iewToCommitDelay=1 613iewToDecodeDelay=1 614iewToFetchDelay=1 615iewToRenameDelay=1 616interrupts=system.cpu1.interrupts 617isa=system.cpu1.isa 618issueToExecuteDelay=1 619issueWidth=8 620itb=system.cpu1.itb 621max_insts_all_threads=0 622max_insts_any_thread=0 623max_loads_all_threads=0 624max_loads_any_thread=0 625needsTSO=false 626numIQEntries=64 627numPhysCCRegs=0 628numPhysFloatRegs=256 629numPhysIntRegs=256 630numROBEntries=192 631numRobs=1 632numThreads=1 633profile=0 634progress_interval=0 635renameToDecodeDelay=1 636renameToFetchDelay=1 637renameToIEWDelay=2 638renameToROBDelay=1 639renameWidth=8 640simpoint_start_insts= 641smtCommitPolicy=RoundRobin 642smtFetchPolicy=SingleThread 643smtIQPolicy=Partitioned 644smtIQThreshold=100 645smtLSQPolicy=Partitioned 646smtLSQThreshold=100 647smtNumFetchingThreads=1 648smtROBPolicy=Partitioned 649smtROBThreshold=100 650socket_id=0 651squashWidth=8 652store_set_clear_period=250000 653switched_out=false 654system=system 655tracer=system.cpu1.tracer 656trapLatency=13 657wbWidth=8 658workload= 659dcache_port=system.cpu1.dcache.cpu_side 660icache_port=system.cpu1.icache.cpu_side 661 662[system.cpu1.branchPred] 663type=TournamentBP 664BTBEntries=4096 665BTBTagSize=16 666RASSize=16 667choiceCtrBits=2 668choicePredictorSize=8192 669eventq_index=0 670globalCtrBits=2 671globalPredictorSize=8192 672instShiftAmt=2 673localCtrBits=2 674localHistoryTableSize=2048 675localPredictorSize=2048 676numThreads=1 677 678[system.cpu1.dcache] 679type=Cache 680children=tags 681addr_ranges=0:18446744073709551615 682assoc=4 683clk_domain=system.cpu_clk_domain 684clusivity=mostly_incl 685demand_mshr_reserve=1 686eventq_index=0 687forward_snoops=true 688hit_latency=2 689is_read_only=false 690max_miss_count=0 691mshrs=4 692prefetch_on_access=false 693prefetcher=Null 694response_latency=2 695sequential_access=false 696size=32768 697system=system 698tags=system.cpu1.dcache.tags 699tgts_per_mshr=20 700write_buffers=8 701writeback_clean=false 702cpu_side=system.cpu1.dcache_port 703mem_side=system.toL2Bus.slave[3] 704 705[system.cpu1.dcache.tags] 706type=LRU 707assoc=4 708block_size=64 709clk_domain=system.cpu_clk_domain 710eventq_index=0 711hit_latency=2 712sequential_access=false 713size=32768 714 715[system.cpu1.dtb] 716type=AlphaTLB 717eventq_index=0 718size=64 719 720[system.cpu1.fuPool] 721type=FUPool 722children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 723FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 system.cpu1.fuPool.FUList5 system.cpu1.fuPool.FUList6 system.cpu1.fuPool.FUList7 system.cpu1.fuPool.FUList8 724eventq_index=0 725 726[system.cpu1.fuPool.FUList0] 727type=FUDesc 728children=opList 729count=6 730eventq_index=0 731opList=system.cpu1.fuPool.FUList0.opList 732 733[system.cpu1.fuPool.FUList0.opList] 734type=OpDesc 735eventq_index=0 736opClass=IntAlu 737opLat=1 738pipelined=true 739 740[system.cpu1.fuPool.FUList1] 741type=FUDesc 742children=opList0 opList1 743count=2 744eventq_index=0 745opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 746 747[system.cpu1.fuPool.FUList1.opList0] 748type=OpDesc 749eventq_index=0 750opClass=IntMult 751opLat=3 752pipelined=true 753 754[system.cpu1.fuPool.FUList1.opList1] 755type=OpDesc 756eventq_index=0 757opClass=IntDiv 758opLat=20 759pipelined=false 760 761[system.cpu1.fuPool.FUList2] 762type=FUDesc 763children=opList0 opList1 opList2 764count=4 765eventq_index=0 766opList=system.cpu1.fuPool.FUList2.opList0 system.cpu1.fuPool.FUList2.opList1 system.cpu1.fuPool.FUList2.opList2 767 768[system.cpu1.fuPool.FUList2.opList0] 769type=OpDesc 770eventq_index=0 771opClass=FloatAdd 772opLat=2 773pipelined=true 774 775[system.cpu1.fuPool.FUList2.opList1] 776type=OpDesc 777eventq_index=0 778opClass=FloatCmp 779opLat=2 780pipelined=true 781 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829pipelined=true 830 831[system.cpu1.fuPool.FUList5] 832type=FUDesc 833children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 834count=4 835eventq_index=0 836opList=system.cpu1.fuPool.FUList5.opList00 system.cpu1.fuPool.FUList5.opList01 system.cpu1.fuPool.FUList5.opList02 system.cpu1.fuPool.FUList5.opList03 system.cpu1.fuPool.FUList5.opList04 system.cpu1.fuPool.FUList5.opList05 system.cpu1.fuPool.FUList5.opList06 system.cpu1.fuPool.FUList5.opList07 system.cpu1.fuPool.FUList5.opList08 system.cpu1.fuPool.FUList5.opList09 system.cpu1.fuPool.FUList5.opList10 system.cpu1.fuPool.FUList5.opList11 system.cpu1.fuPool.FUList5.opList12 system.cpu1.fuPool.FUList5.opList13 system.cpu1.fuPool.FUList5.opList14 system.cpu1.fuPool.FUList5.opList15 system.cpu1.fuPool.FUList5.opList16 system.cpu1.fuPool.FUList5.opList17 system.cpu1.fuPool.FUList5.opList18 system.cpu1.fuPool.FUList5.opList19 837 838[system.cpu1.fuPool.FUList5.opList00] 839type=OpDesc 840eventq_index=0 841opClass=SimdAdd 842opLat=1 843pipelined=true 844 845[system.cpu1.fuPool.FUList5.opList01] 846type=OpDesc 847eventq_index=0 848opClass=SimdAddAcc 849opLat=1 850pipelined=true 851 852[system.cpu1.fuPool.FUList5.opList02] 853type=OpDesc 854eventq_index=0 855opClass=SimdAlu 856opLat=1 857pipelined=true 858 859[system.cpu1.fuPool.FUList5.opList03] 860type=OpDesc 861eventq_index=0 862opClass=SimdCmp 863opLat=1 864pipelined=true 865 866[system.cpu1.fuPool.FUList5.opList04] 867type=OpDesc 868eventq_index=0 869opClass=SimdCvt 870opLat=1 871pipelined=true 872 873[system.cpu1.fuPool.FUList5.opList05] 874type=OpDesc 875eventq_index=0 876opClass=SimdMisc 877opLat=1 878pipelined=true 879 880[system.cpu1.fuPool.FUList5.opList06] 881type=OpDesc 882eventq_index=0 883opClass=SimdMult 884opLat=1 885pipelined=true 886 887[system.cpu1.fuPool.FUList5.opList07] 888type=OpDesc 889eventq_index=0 890opClass=SimdMultAcc 891opLat=1 892pipelined=true 893 894[system.cpu1.fuPool.FUList5.opList08] 895type=OpDesc 896eventq_index=0 897opClass=SimdShift 898opLat=1 899pipelined=true 900 901[system.cpu1.fuPool.FUList5.opList09] 902type=OpDesc 903eventq_index=0 904opClass=SimdShiftAcc 905opLat=1 906pipelined=true 907 908[system.cpu1.fuPool.FUList5.opList10] 909type=OpDesc 910eventq_index=0 911opClass=SimdSqrt 912opLat=1 913pipelined=true 914 915[system.cpu1.fuPool.FUList5.opList11] 916type=OpDesc 917eventq_index=0 918opClass=SimdFloatAdd 919opLat=1 920pipelined=true 921 922[system.cpu1.fuPool.FUList5.opList12] 923type=OpDesc 924eventq_index=0 925opClass=SimdFloatAlu 926opLat=1 927pipelined=true 928 929[system.cpu1.fuPool.FUList5.opList13] 930type=OpDesc 931eventq_index=0 932opClass=SimdFloatCmp 933opLat=1 934pipelined=true 935 936[system.cpu1.fuPool.FUList5.opList14] 937type=OpDesc 938eventq_index=0 939opClass=SimdFloatCvt 940opLat=1 941pipelined=true 942 943[system.cpu1.fuPool.FUList5.opList15] 944type=OpDesc 945eventq_index=0 946opClass=SimdFloatDiv 947opLat=1 948pipelined=true 949 950[system.cpu1.fuPool.FUList5.opList16] 951type=OpDesc 952eventq_index=0 953opClass=SimdFloatMisc 954opLat=1 955pipelined=true 956 957[system.cpu1.fuPool.FUList5.opList17] 958type=OpDesc 959eventq_index=0 960opClass=SimdFloatMult 961opLat=1 962pipelined=true 963 964[system.cpu1.fuPool.FUList5.opList18] 965type=OpDesc 966eventq_index=0 967opClass=SimdFloatMultAcc 968opLat=1 969pipelined=true 970 971[system.cpu1.fuPool.FUList5.opList19] 972type=OpDesc 973eventq_index=0 974opClass=SimdFloatSqrt 975opLat=1 976pipelined=true 977 978[system.cpu1.fuPool.FUList6] 979type=FUDesc 980children=opList 981count=0 982eventq_index=0 983opList=system.cpu1.fuPool.FUList6.opList 984 985[system.cpu1.fuPool.FUList6.opList] 986type=OpDesc 987eventq_index=0 988opClass=MemWrite 989opLat=1 990pipelined=true 991 992[system.cpu1.fuPool.FUList7] 993type=FUDesc 994children=opList0 opList1 995count=4 996eventq_index=0 997opList=system.cpu1.fuPool.FUList7.opList0 system.cpu1.fuPool.FUList7.opList1 998 999[system.cpu1.fuPool.FUList7.opList0] 1000type=OpDesc 1001eventq_index=0 1002opClass=MemRead 1003opLat=1 1004pipelined=true 1005 1006[system.cpu1.fuPool.FUList7.opList1] 1007type=OpDesc 1008eventq_index=0 1009opClass=MemWrite 1010opLat=1 1011pipelined=true 1012 1013[system.cpu1.fuPool.FUList8] 1014type=FUDesc 1015children=opList 1016count=1 1017eventq_index=0 1018opList=system.cpu1.fuPool.FUList8.opList 1019 1020[system.cpu1.fuPool.FUList8.opList] 1021type=OpDesc 1022eventq_index=0 1023opClass=IprAccess 1024opLat=3 1025pipelined=false 1026 1027[system.cpu1.icache] 1028type=Cache 1029children=tags 1030addr_ranges=0:18446744073709551615 1031assoc=1 1032clk_domain=system.cpu_clk_domain 1033clusivity=mostly_incl 1034demand_mshr_reserve=1 1035eventq_index=0 1036forward_snoops=true 1037hit_latency=2 1038is_read_only=true 1039max_miss_count=0 1040mshrs=4 1041prefetch_on_access=false 1042prefetcher=Null 1043response_latency=2 1044sequential_access=false 1045size=32768 1046system=system 1047tags=system.cpu1.icache.tags 1048tgts_per_mshr=20 1049write_buffers=8 1050writeback_clean=true 1051cpu_side=system.cpu1.icache_port 1052mem_side=system.toL2Bus.slave[2] 1053 1054[system.cpu1.icache.tags] 1055type=LRU 1056assoc=1 1057block_size=64 1058clk_domain=system.cpu_clk_domain 1059eventq_index=0 1060hit_latency=2 1061sequential_access=false 1062size=32768 1063 1064[system.cpu1.interrupts] 1065type=AlphaInterrupts 1066eventq_index=0 1067 1068[system.cpu1.isa] 1069type=AlphaISA 1070eventq_index=0 1071system=system 1072 1073[system.cpu1.itb] 1074type=AlphaTLB 1075eventq_index=0 1076size=48 1077 1078[system.cpu1.tracer] 1079type=ExeTracer 1080eventq_index=0 1081 1082[system.cpu_clk_domain] 1083type=SrcClockDomain 1084clock=500 1085domain_id=-1 1086eventq_index=0 1087init_perf_level=0 1088voltage_domain=system.voltage_domain 1089 1090[system.disk0] 1091type=IdeDisk 1092children=image 1093delay=1000000 1094driveID=master 1095eventq_index=0 1096image=system.disk0.image 1097 1098[system.disk0.image] 1099type=CowDiskImage 1100children=child 1101child=system.disk0.image.child 1102eventq_index=0 1103image_file= 1104read_only=false 1105table_size=65536 1106 1107[system.disk0.image.child] 1108type=RawDiskImage 1109eventq_index=0 1110image_file=/work/gem5/dist/disks/linux-latest.img 1111read_only=true 1112 1113[system.disk2] 1114type=IdeDisk 1115children=image 1116delay=1000000 1117driveID=master 1118eventq_index=0 1119image=system.disk2.image 1120 1121[system.disk2.image] 1122type=CowDiskImage 1123children=child 1124child=system.disk2.image.child 1125eventq_index=0 1126image_file= 1127read_only=false 1128table_size=65536 1129 1130[system.disk2.image.child] 1131type=RawDiskImage 1132eventq_index=0 1133image_file=/work/gem5/dist/disks/linux-bigswap2.img 1134read_only=true 1135 1136[system.dvfs_handler] 1137type=DVFSHandler 1138domains= 1139enable=false 1140eventq_index=0 1141sys_clk_domain=system.clk_domain 1142transition_latency=100000000 1143 1144[system.intrctrl] 1145type=IntrControl 1146eventq_index=0 1147sys=system 1148 1149[system.iobus] 1150type=NoncoherentXBar 1151clk_domain=system.clk_domain 1152eventq_index=0 1153forward_latency=1 1154frontend_latency=2 1155response_latency=2 1156use_default_range=false 1157width=16 1158master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side 1159slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 1160 1161[system.iocache] 1162type=Cache 1163children=tags 1164addr_ranges=0:134217727 1165assoc=8 1166clk_domain=system.clk_domain 1167clusivity=mostly_incl 1168demand_mshr_reserve=1 1169eventq_index=0 1170forward_snoops=false 1171hit_latency=50 1172is_read_only=false 1173max_miss_count=0 1174mshrs=20 1175prefetch_on_access=false 1176prefetcher=Null 1177response_latency=50 1178sequential_access=false 1179size=1024 1180system=system 1181tags=system.iocache.tags 1182tgts_per_mshr=12 1183write_buffers=8 1184writeback_clean=false 1185cpu_side=system.iobus.master[27] 1186mem_side=system.membus.slave[2] 1187 1188[system.iocache.tags] 1189type=LRU 1190assoc=8 1191block_size=64 1192clk_domain=system.clk_domain 1193eventq_index=0 1194hit_latency=50 1195sequential_access=false 1196size=1024 1197 1198[system.l2c] 1199type=Cache 1200children=tags 1201addr_ranges=0:18446744073709551615 1202assoc=8 1203clk_domain=system.cpu_clk_domain 1204clusivity=mostly_incl 1205demand_mshr_reserve=1 1206eventq_index=0 1207forward_snoops=true 1208hit_latency=20 1209is_read_only=false 1210max_miss_count=0 1211mshrs=20 1212prefetch_on_access=false 1213prefetcher=Null 1214response_latency=20 1215sequential_access=false 1216size=4194304 1217system=system 1218tags=system.l2c.tags 1219tgts_per_mshr=12 1220write_buffers=8 1221writeback_clean=false 1222cpu_side=system.toL2Bus.master[0] 1223mem_side=system.membus.slave[1] 1224 1225[system.l2c.tags] 1226type=LRU 1227assoc=8 1228block_size=64 1229clk_domain=system.cpu_clk_domain 1230eventq_index=0 1231hit_latency=20 1232sequential_access=false 1233size=4194304 1234 1235[system.membus] 1236type=CoherentXBar 1237children=badaddr_responder 1238clk_domain=system.clk_domain 1239eventq_index=0 1240forward_latency=4 1241frontend_latency=3 1242response_latency=2 1243snoop_filter=Null 1244snoop_response_latency=4 1245system=system 1246use_default_range=false 1247width=16 1248default=system.membus.badaddr_responder.pio 1249master=system.bridge.slave system.physmem.port 1250slave=system.system_port system.l2c.mem_side system.iocache.mem_side 1251 1252[system.membus.badaddr_responder] 1253type=IsaFake 1254clk_domain=system.clk_domain 1255eventq_index=0 1256fake_mem=false 1257pio_addr=0 1258pio_latency=100000 1259pio_size=8 1260ret_bad_addr=true 1261ret_data16=65535 1262ret_data32=4294967295 1263ret_data64=18446744073709551615 1264ret_data8=255 1265system=system 1266update_data=false 1267warn_access= 1268pio=system.membus.default 1269 1270[system.physmem] 1271type=DRAMCtrl 1272IDD0=0.075000 1273IDD02=0.000000 1274IDD2N=0.050000 1275IDD2N2=0.000000 1276IDD2P0=0.000000 1277IDD2P02=0.000000 1278IDD2P1=0.000000 1279IDD2P12=0.000000 1280IDD3N=0.057000 1281IDD3N2=0.000000 1282IDD3P0=0.000000 1283IDD3P02=0.000000 1284IDD3P1=0.000000 1285IDD3P12=0.000000 1286IDD4R=0.187000 1287IDD4R2=0.000000 1288IDD4W=0.165000 1289IDD4W2=0.000000 1290IDD5=0.220000 1291IDD52=0.000000 1292IDD6=0.000000 1293IDD62=0.000000 1294VDD=1.500000 1295VDD2=0.000000 1296activation_limit=4 1297addr_mapping=RoRaBaCoCh 1298bank_groups_per_rank=0 1299banks_per_rank=8 1300burst_length=8 1301channels=1 1302clk_domain=system.clk_domain 1303conf_table_reported=true 1304device_bus_width=8 1305device_rowbuffer_size=1024 1306device_size=536870912 1307devices_per_rank=8 1308dll=true 1309eventq_index=0 1310in_addr_map=true 1311max_accesses_per_row=16 1312mem_sched_policy=frfcfs 1313min_writes_per_switch=16 1314null=false 1315page_policy=open_adaptive 1316range=0:134217727 1317ranks_per_channel=2 1318read_buffer_size=32 1319static_backend_latency=10000 1320static_frontend_latency=10000 1321tBURST=5000 1322tCCD_L=0 1323tCK=1250 1324tCL=13750 1325tCS=2500 1326tRAS=35000 1327tRCD=13750 1328tREFI=7800000 1329tRFC=260000 1330tRP=13750 1331tRRD=6000 1332tRRD_L=0 1333tRTP=7500 1334tRTW=2500 1335tWR=15000 1336tWTR=7500 1337tXAW=30000 1338tXP=0 1339tXPDLL=0 1340tXS=0 1341tXSDLL=0 1342write_buffer_size=64 1343write_high_thresh_perc=85 1344write_low_thresh_perc=50 1345port=system.membus.master[1] 1346 1347[system.simple_disk] 1348type=SimpleDisk 1349children=disk 1350disk=system.simple_disk.disk 1351eventq_index=0 1352system=system 1353 1354[system.simple_disk.disk] 1355type=RawDiskImage 1356eventq_index=0 1357image_file=/work/gem5/dist/disks/linux-latest.img 1358read_only=true 1359 1360[system.terminal] 1361type=Terminal 1362eventq_index=0 1363intr_control=system.intrctrl 1364number=0 1365output=true 1366port=3456 1367 1368[system.toL2Bus] 1369type=CoherentXBar 1370children=snoop_filter 1371clk_domain=system.cpu_clk_domain 1372eventq_index=0 1373forward_latency=0 1374frontend_latency=1 1375response_latency=1 1376snoop_filter=system.toL2Bus.snoop_filter 1377snoop_response_latency=1 1378system=system 1379use_default_range=false 1380width=32 1381master=system.l2c.cpu_side 1382slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 1383 1384[system.toL2Bus.snoop_filter] 1385type=SnoopFilter 1386eventq_index=0 1387lookup_latency=0 1388max_capacity=8388608 1389system=system 1390 1391[system.tsunami] 1392type=Tsunami 1393children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart 1394eventq_index=0 1395intrctrl=system.intrctrl 1396system=system 1397 1398[system.tsunami.backdoor] 1399type=AlphaBackdoor 1400clk_domain=system.clk_domain 1401cpu=system.cpu0 1402disk=system.simple_disk 1403eventq_index=0 1404pio_addr=8804682956800 1405pio_latency=100000 1406platform=system.tsunami 1407system=system 1408terminal=system.terminal 1409pio=system.iobus.master[24] 1410 1411[system.tsunami.cchip] 1412type=TsunamiCChip 1413clk_domain=system.clk_domain 1414eventq_index=0 1415pio_addr=8803072344064 1416pio_latency=100000 1417system=system 1418tsunami=system.tsunami 1419pio=system.iobus.master[0] 1420 1421[system.tsunami.ethernet] 1422type=NSGigE 1423BAR0=1 1424BAR0LegacyIO=false 1425BAR0Size=256 1426BAR1=0 1427BAR1LegacyIO=false 1428BAR1Size=4096 1429BAR2=0 1430BAR2LegacyIO=false 1431BAR2Size=0 1432BAR3=0 1433BAR3LegacyIO=false 1434BAR3Size=0 1435BAR4=0 1436BAR4LegacyIO=false 1437BAR4Size=0 1438BAR5=0 1439BAR5LegacyIO=false 1440BAR5Size=0 1441BIST=0 1442CacheLineSize=0 1443CapabilityPtr=0 1444CardbusCIS=0 1445ClassCode=2 1446Command=0 1447DeviceID=34 1448ExpansionROM=0 1449HeaderType=0 1450InterruptLine=30 1451InterruptPin=1 1452LatencyTimer=0 1453LegacyIOBase=0 1454MSICAPBaseOffset=0 1455MSICAPCapId=0 1456MSICAPMaskBits=0 1457MSICAPMsgAddr=0 1458MSICAPMsgCtrl=0 1459MSICAPMsgData=0 1460MSICAPMsgUpperAddr=0 1461MSICAPNextCapability=0 1462MSICAPPendingBits=0 1463MSIXCAPBaseOffset=0 1464MSIXCAPCapId=0 1465MSIXCAPNextCapability=0 1466MSIXMsgCtrl=0 1467MSIXPbaOffset=0 1468MSIXTableOffset=0 1469MaximumLatency=52 1470MinimumGrant=176 1471PMCAPBaseOffset=0 1472PMCAPCapId=0 1473PMCAPCapabilities=0 1474PMCAPCtrlStatus=0 1475PMCAPNextCapability=0 1476PXCAPBaseOffset=0 1477PXCAPCapId=0 1478PXCAPCapabilities=0 1479PXCAPDevCap2=0 1480PXCAPDevCapabilities=0 1481PXCAPDevCtrl=0 1482PXCAPDevCtrl2=0 1483PXCAPDevStatus=0 1484PXCAPLinkCap=0 1485PXCAPLinkCtrl=0 1486PXCAPLinkStatus=0 1487PXCAPNextCapability=0 1488ProgIF=0 1489Revision=0 1490Status=656 1491SubClassCode=0 1492SubsystemID=0 1493SubsystemVendorID=0 1494VendorID=4107 1495clk_domain=system.clk_domain 1496config_latency=20000 1497dma_data_free=false 1498dma_desc_free=false 1499dma_no_allocate=true 1500dma_read_delay=0 1501dma_read_factor=0 1502dma_write_delay=0 1503dma_write_factor=0 1504eventq_index=0 1505hardware_address=00:90:00:00:00:01 1506host=system.tsunami.pchip 1507intr_delay=10000000 1508pci_bus=0 1509pci_dev=1 1510pci_func=0 1511pio_latency=30000 1512rss=false 1513rx_delay=1000000 1514rx_fifo_size=524288 1515rx_filter=true 1516rx_thread=false 1517system=system 1518tx_delay=1000000 1519tx_fifo_size=524288 1520tx_thread=false 1521dma=system.iobus.slave[2] 1522pio=system.iobus.master[26] 1523 1524[system.tsunami.fake_OROM] 1525type=IsaFake 1526clk_domain=system.clk_domain 1527eventq_index=0 1528fake_mem=false 1529pio_addr=8796093677568 1530pio_latency=100000 1531pio_size=393216 1532ret_bad_addr=false 1533ret_data16=65535 1534ret_data32=4294967295 1535ret_data64=18446744073709551615 1536ret_data8=255 1537system=system 1538update_data=false 1539warn_access= 1540pio=system.iobus.master[8] 1541 1542[system.tsunami.fake_ata0] 1543type=IsaFake 1544clk_domain=system.clk_domain 1545eventq_index=0 1546fake_mem=false 1547pio_addr=8804615848432 1548pio_latency=100000 1549pio_size=8 1550ret_bad_addr=false 1551ret_data16=65535 1552ret_data32=4294967295 1553ret_data64=18446744073709551615 1554ret_data8=255 1555system=system 1556update_data=false 1557warn_access= 1558pio=system.iobus.master[19] 1559 1560[system.tsunami.fake_ata1] 1561type=IsaFake 1562clk_domain=system.clk_domain 1563eventq_index=0 1564fake_mem=false 1565pio_addr=8804615848304 1566pio_latency=100000 1567pio_size=8 1568ret_bad_addr=false 1569ret_data16=65535 1570ret_data32=4294967295 1571ret_data64=18446744073709551615 1572ret_data8=255 1573system=system 1574update_data=false 1575warn_access= 1576pio=system.iobus.master[20] 1577 1578[system.tsunami.fake_pnp_addr] 1579type=IsaFake 1580clk_domain=system.clk_domain 1581eventq_index=0 1582fake_mem=false 1583pio_addr=8804615848569 1584pio_latency=100000 1585pio_size=8 1586ret_bad_addr=false 1587ret_data16=65535 1588ret_data32=4294967295 1589ret_data64=18446744073709551615 1590ret_data8=255 1591system=system 1592update_data=false 1593warn_access= 1594pio=system.iobus.master[9] 1595 1596[system.tsunami.fake_pnp_read0] 1597type=IsaFake 1598clk_domain=system.clk_domain 1599eventq_index=0 1600fake_mem=false 1601pio_addr=8804615848451 1602pio_latency=100000 1603pio_size=8 1604ret_bad_addr=false 1605ret_data16=65535 1606ret_data32=4294967295 1607ret_data64=18446744073709551615 1608ret_data8=255 1609system=system 1610update_data=false 1611warn_access= 1612pio=system.iobus.master[11] 1613 1614[system.tsunami.fake_pnp_read1] 1615type=IsaFake 1616clk_domain=system.clk_domain 1617eventq_index=0 1618fake_mem=false 1619pio_addr=8804615848515 1620pio_latency=100000 1621pio_size=8 1622ret_bad_addr=false 1623ret_data16=65535 1624ret_data32=4294967295 1625ret_data64=18446744073709551615 1626ret_data8=255 1627system=system 1628update_data=false 1629warn_access= 1630pio=system.iobus.master[12] 1631 1632[system.tsunami.fake_pnp_read2] 1633type=IsaFake 1634clk_domain=system.clk_domain 1635eventq_index=0 1636fake_mem=false 1637pio_addr=8804615848579 1638pio_latency=100000 1639pio_size=8 1640ret_bad_addr=false 1641ret_data16=65535 1642ret_data32=4294967295 1643ret_data64=18446744073709551615 1644ret_data8=255 1645system=system 1646update_data=false 1647warn_access= 1648pio=system.iobus.master[13] 1649 1650[system.tsunami.fake_pnp_read3] 1651type=IsaFake 1652clk_domain=system.clk_domain 1653eventq_index=0 1654fake_mem=false 1655pio_addr=8804615848643 1656pio_latency=100000 1657pio_size=8 1658ret_bad_addr=false 1659ret_data16=65535 1660ret_data32=4294967295 1661ret_data64=18446744073709551615 1662ret_data8=255 1663system=system 1664update_data=false 1665warn_access= 1666pio=system.iobus.master[14] 1667 1668[system.tsunami.fake_pnp_read4] 1669type=IsaFake 1670clk_domain=system.clk_domain 1671eventq_index=0 1672fake_mem=false 1673pio_addr=8804615848707 1674pio_latency=100000 1675pio_size=8 1676ret_bad_addr=false 1677ret_data16=65535 1678ret_data32=4294967295 1679ret_data64=18446744073709551615 1680ret_data8=255 1681system=system 1682update_data=false 1683warn_access= 1684pio=system.iobus.master[15] 1685 1686[system.tsunami.fake_pnp_read5] 1687type=IsaFake 1688clk_domain=system.clk_domain 1689eventq_index=0 1690fake_mem=false 1691pio_addr=8804615848771 1692pio_latency=100000 1693pio_size=8 1694ret_bad_addr=false 1695ret_data16=65535 1696ret_data32=4294967295 1697ret_data64=18446744073709551615 1698ret_data8=255 1699system=system 1700update_data=false 1701warn_access= 1702pio=system.iobus.master[16] 1703 1704[system.tsunami.fake_pnp_read6] 1705type=IsaFake 1706clk_domain=system.clk_domain 1707eventq_index=0 1708fake_mem=false 1709pio_addr=8804615848835 1710pio_latency=100000 1711pio_size=8 1712ret_bad_addr=false 1713ret_data16=65535 1714ret_data32=4294967295 1715ret_data64=18446744073709551615 1716ret_data8=255 1717system=system 1718update_data=false 1719warn_access= 1720pio=system.iobus.master[17] 1721 1722[system.tsunami.fake_pnp_read7] 1723type=IsaFake 1724clk_domain=system.clk_domain 1725eventq_index=0 1726fake_mem=false 1727pio_addr=8804615848899 1728pio_latency=100000 1729pio_size=8 1730ret_bad_addr=false 1731ret_data16=65535 1732ret_data32=4294967295 1733ret_data64=18446744073709551615 1734ret_data8=255 1735system=system 1736update_data=false 1737warn_access= 1738pio=system.iobus.master[18] 1739 1740[system.tsunami.fake_pnp_write] 1741type=IsaFake 1742clk_domain=system.clk_domain 1743eventq_index=0 1744fake_mem=false 1745pio_addr=8804615850617 1746pio_latency=100000 1747pio_size=8 1748ret_bad_addr=false 1749ret_data16=65535 1750ret_data32=4294967295 1751ret_data64=18446744073709551615 1752ret_data8=255 1753system=system 1754update_data=false 1755warn_access= 1756pio=system.iobus.master[10] 1757 1758[system.tsunami.fake_ppc] 1759type=IsaFake 1760clk_domain=system.clk_domain 1761eventq_index=0 1762fake_mem=false 1763pio_addr=8804615848891 1764pio_latency=100000 1765pio_size=8 1766ret_bad_addr=false 1767ret_data16=65535 1768ret_data32=4294967295 1769ret_data64=18446744073709551615 1770ret_data8=255 1771system=system 1772update_data=false 1773warn_access= 1774pio=system.iobus.master[7] 1775 1776[system.tsunami.fake_sm_chip] 1777type=IsaFake 1778clk_domain=system.clk_domain 1779eventq_index=0 1780fake_mem=false 1781pio_addr=8804615848816 1782pio_latency=100000 1783pio_size=8 1784ret_bad_addr=false 1785ret_data16=65535 1786ret_data32=4294967295 1787ret_data64=18446744073709551615 1788ret_data8=255 1789system=system 1790update_data=false 1791warn_access= 1792pio=system.iobus.master[2] 1793 1794[system.tsunami.fake_uart1] 1795type=IsaFake 1796clk_domain=system.clk_domain 1797eventq_index=0 1798fake_mem=false 1799pio_addr=8804615848696 1800pio_latency=100000 1801pio_size=8 1802ret_bad_addr=false 1803ret_data16=65535 1804ret_data32=4294967295 1805ret_data64=18446744073709551615 1806ret_data8=255 1807system=system 1808update_data=false 1809warn_access= 1810pio=system.iobus.master[3] 1811 1812[system.tsunami.fake_uart2] 1813type=IsaFake 1814clk_domain=system.clk_domain 1815eventq_index=0 1816fake_mem=false 1817pio_addr=8804615848936 1818pio_latency=100000 1819pio_size=8 1820ret_bad_addr=false 1821ret_data16=65535 1822ret_data32=4294967295 1823ret_data64=18446744073709551615 1824ret_data8=255 1825system=system 1826update_data=false 1827warn_access= 1828pio=system.iobus.master[4] 1829 1830[system.tsunami.fake_uart3] 1831type=IsaFake 1832clk_domain=system.clk_domain 1833eventq_index=0 1834fake_mem=false 1835pio_addr=8804615848680 1836pio_latency=100000 1837pio_size=8 1838ret_bad_addr=false 1839ret_data16=65535 1840ret_data32=4294967295 1841ret_data64=18446744073709551615 1842ret_data8=255 1843system=system 1844update_data=false 1845warn_access= 1846pio=system.iobus.master[5] 1847 1848[system.tsunami.fake_uart4] 1849type=IsaFake 1850clk_domain=system.clk_domain 1851eventq_index=0 1852fake_mem=false 1853pio_addr=8804615848944 1854pio_latency=100000 1855pio_size=8 1856ret_bad_addr=false 1857ret_data16=65535 1858ret_data32=4294967295 1859ret_data64=18446744073709551615 1860ret_data8=255 1861system=system 1862update_data=false 1863warn_access= 1864pio=system.iobus.master[6] 1865 1866[system.tsunami.fb] 1867type=BadDevice 1868clk_domain=system.clk_domain 1869devicename=FrameBuffer 1870eventq_index=0 1871pio_addr=8804615848912 1872pio_latency=100000 1873system=system 1874pio=system.iobus.master[21] 1875 1876[system.tsunami.ide] 1877type=IdeController 1878BAR0=1 1879BAR0LegacyIO=false 1880BAR0Size=8 1881BAR1=1 1882BAR1LegacyIO=false 1883BAR1Size=4 1884BAR2=1 1885BAR2LegacyIO=false 1886BAR2Size=8 1887BAR3=1 1888BAR3LegacyIO=false 1889BAR3Size=4 1890BAR4=1 1891BAR4LegacyIO=false 1892BAR4Size=16 1893BAR5=1 1894BAR5LegacyIO=false 1895BAR5Size=0 1896BIST=0 1897CacheLineSize=0 1898CapabilityPtr=0 1899CardbusCIS=0 1900ClassCode=1 1901Command=0 1902DeviceID=28945 1903ExpansionROM=0 1904HeaderType=0 1905InterruptLine=31 1906InterruptPin=1 1907LatencyTimer=0 1908LegacyIOBase=0 1909MSICAPBaseOffset=0 1910MSICAPCapId=0 1911MSICAPMaskBits=0 1912MSICAPMsgAddr=0 1913MSICAPMsgCtrl=0 1914MSICAPMsgData=0 1915MSICAPMsgUpperAddr=0 1916MSICAPNextCapability=0 1917MSICAPPendingBits=0 1918MSIXCAPBaseOffset=0 1919MSIXCAPCapId=0 1920MSIXCAPNextCapability=0 1921MSIXMsgCtrl=0 1922MSIXPbaOffset=0 1923MSIXTableOffset=0 1924MaximumLatency=0 1925MinimumGrant=0 1926PMCAPBaseOffset=0 1927PMCAPCapId=0 1928PMCAPCapabilities=0 1929PMCAPCtrlStatus=0 1930PMCAPNextCapability=0 1931PXCAPBaseOffset=0 1932PXCAPCapId=0 1933PXCAPCapabilities=0 1934PXCAPDevCap2=0 1935PXCAPDevCapabilities=0 1936PXCAPDevCtrl=0 1937PXCAPDevCtrl2=0 1938PXCAPDevStatus=0 1939PXCAPLinkCap=0 1940PXCAPLinkCtrl=0 1941PXCAPLinkStatus=0 1942PXCAPNextCapability=0 1943ProgIF=133 1944Revision=0 1945Status=640 1946SubClassCode=1 1947SubsystemID=0 1948SubsystemVendorID=0 1949VendorID=32902 1950clk_domain=system.clk_domain 1951config_latency=20000 1952ctrl_offset=0 1953disks=system.disk0 system.disk2 1954eventq_index=0 1955host=system.tsunami.pchip 1956io_shift=0 1957pci_bus=0 1958pci_dev=0 1959pci_func=0 1960pio_latency=30000 1961system=system 1962dma=system.iobus.slave[1] 1963pio=system.iobus.master[25] 1964 1965[system.tsunami.io] 1966type=TsunamiIO 1967clk_domain=system.clk_domain 1968eventq_index=0 1969frequency=976562500 1970pio_addr=8804615847936 1971pio_latency=100000 1972system=system 1973time=Thu Jan 1 00:00:00 2009 1974tsunami=system.tsunami 1975year_is_bcd=false 1976pio=system.iobus.master[22] 1977 1978[system.tsunami.pchip] 1979type=TsunamiPChip 1980clk_domain=system.clk_domain 1981conf_base=8804649402368 1982conf_device_bits=8 1983conf_size=16777216 1984eventq_index=0 1985pci_dma_base=0 1986pci_mem_base=8796093022208 1987pci_pio_base=8804615847936 1988pio_addr=8802535473152 1989pio_latency=100000 1990platform=system.tsunami 1991system=system 1992tsunami=system.tsunami 1993pio=system.iobus.master[1] 1994 1995[system.tsunami.uart] 1996type=Uart8250 1997clk_domain=system.clk_domain 1998eventq_index=0 1999pio_addr=8804615848952 2000pio_latency=100000 2001platform=system.tsunami 2002system=system 2003terminal=system.terminal 2004pio=system.iobus.master[23] 2005 2006[system.voltage_domain] 2007type=VoltageDomain 2008eventq_index=0 2009voltage=1.000000 2010 2011