simple-timing-ruby.py revision 8920
1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright 9# notice, this list of conditions and the following disclaimer in the 10# documentation and/or other materials provided with the distribution; 11# neither the name of the copyright holders nor the names of its 12# contributors may be used to endorse or promote products derived from 13# this software without specific prior written permission. 14# 15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26# 27# Authors: Steve Reinhardt 28 29import m5 30from m5.objects import * 31from m5.defines import buildEnv 32from m5.util import addToPath 33import os, optparse, sys 34 35# Get paths we might need 36config_path = os.path.dirname(os.path.abspath(__file__)) 37config_root = os.path.dirname(config_path) 38addToPath(config_root+'/configs/common') 39addToPath(config_root+'/configs/ruby') 40 41import Ruby 42import Options 43 44parser = optparse.OptionParser() 45Options.addCommonOptions(parser) 46 47# Add the ruby specific and protocol specific options 48Ruby.define_options(parser) 49 50(options, args) = parser.parse_args() 51 52# 53# Set the default cache size and associativity to be very small to encourage 54# races between requests and writebacks. 55# 56options.l1d_size="256B" 57options.l1i_size="256B" 58options.l2_size="512B" 59options.l3_size="1kB" 60options.l1d_assoc=2 61options.l1i_assoc=2 62options.l2_assoc=2 63options.l3_assoc=2 64 65# this is a uniprocessor only test 66options.num_cpus = 1 67 68cpu = TimingSimpleCPU(cpu_id=0) 69system = System(cpu = cpu, physmem = PhysicalMemory()) 70 71Ruby.create_system(options, system) 72 73assert(len(system.ruby._cpu_ruby_ports) == 1) 74 75# create the interrupt controller 76cpu.createInterruptController() 77 78# 79# Tie the cpu cache ports to the ruby cpu ports and 80# physmem, respectively 81# 82cpu.connectAllPorts(system.ruby._cpu_ruby_ports[0]) 83 84# ----------------------- 85# run simulation 86# ----------------------- 87 88root = Root(full_system = False, system = system) 89root.system.mem_mode = 'timing' 90 91# Not much point in this being higher than the L1 latency 92m5.ticks.setGlobalFrequency('1ns') 93