o3-timing-mt.py revision 8134
111569Sgabor.dozsa@arm.com# Copyright (c) 2006-2007 The Regents of The University of Michigan 211569Sgabor.dozsa@arm.com# All rights reserved. 311569Sgabor.dozsa@arm.com# 411569Sgabor.dozsa@arm.com# Redistribution and use in source and binary forms, with or without 511569Sgabor.dozsa@arm.com# modification, are permitted provided that the following conditions are 611569Sgabor.dozsa@arm.com# met: redistributions of source code must retain the above copyright 711569Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer; 811569Sgabor.dozsa@arm.com# redistributions in binary form must reproduce the above copyright 911569Sgabor.dozsa@arm.com# notice, this list of conditions and the following disclaimer in the 1011569Sgabor.dozsa@arm.com# documentation and/or other materials provided with the distribution; 1111569Sgabor.dozsa@arm.com# neither the name of the copyright holders nor the names of its 1211569Sgabor.dozsa@arm.com# contributors may be used to endorse or promote products derived from 1311569Sgabor.dozsa@arm.com# this software without specific prior written permission. 1411569Sgabor.dozsa@arm.com# 1511569Sgabor.dozsa@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1611569Sgabor.dozsa@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1711569Sgabor.dozsa@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1811569Sgabor.dozsa@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 1911569Sgabor.dozsa@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2011569Sgabor.dozsa@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2111569Sgabor.dozsa@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2211569Sgabor.dozsa@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2311569Sgabor.dozsa@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2411569Sgabor.dozsa@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2511569Sgabor.dozsa@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2611569Sgabor.dozsa@arm.com# 2711569Sgabor.dozsa@arm.com# Authors: Steve Reinhardt 2811569Sgabor.dozsa@arm.com 2911569Sgabor.dozsa@arm.comimport m5 3011569Sgabor.dozsa@arm.comfrom m5.objects import * 3111569Sgabor.dozsa@arm.comm5.util.addToPath('../configs/common') 3211569Sgabor.dozsa@arm.com 3311569Sgabor.dozsa@arm.comclass MyCache(BaseCache): 3411569Sgabor.dozsa@arm.com assoc = 2 3511569Sgabor.dozsa@arm.com block_size = 64 3611569Sgabor.dozsa@arm.com latency = '1ns' 3711569Sgabor.dozsa@arm.com mshrs = 10 3811569Sgabor.dozsa@arm.com tgts_per_mshr = 5 3911569Sgabor.dozsa@arm.com 4011569Sgabor.dozsa@arm.comclass MyL1Cache(MyCache): 4111569Sgabor.dozsa@arm.com is_top_level = True 4211569Sgabor.dozsa@arm.com 4311569Sgabor.dozsa@arm.comcpu = DerivO3CPU(cpu_id=0) 4411569Sgabor.dozsa@arm.comcpu.addTwoLevelCacheHierarchy(MyL1Cache(size = '128kB'), 4511569Sgabor.dozsa@arm.com MyL1Cache(size = '256kB'), 4611569Sgabor.dozsa@arm.com MyCache(size = '2MB')) 4711569Sgabor.dozsa@arm.comcpu.clock = '2GHz' 4811569Sgabor.dozsa@arm.com 4911569Sgabor.dozsa@arm.comsystem = System(cpu = cpu, 5011569Sgabor.dozsa@arm.com physmem = PhysicalMemory(), 5111569Sgabor.dozsa@arm.com membus = Bus()) 5211569Sgabor.dozsa@arm.comsystem.physmem.port = system.membus.port 5311569Sgabor.dozsa@arm.comcpu.connectAllPorts(system.membus) 5411569Sgabor.dozsa@arm.com 5511569Sgabor.dozsa@arm.comroot = Root(system = system) 5611569Sgabor.dozsa@arm.com