paljtoslave.S revision 8026:680f5c014bed 
1/*
2 * Copyright (c) 2003, 2004
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator.
7 *
8 * Permission is granted to use, copy, create derivative works and
9 * redistribute this software and such derivative works for any purpose,
10 * so long as the copyright notice above, this grant of permission, and
11 * the disclaimer below appear in all copies made; and so long as the
12 * name of The University of Michigan is not used in any advertising or
13 * publicity pertaining to the use or distribution of this software
14 * without specific, written prior authorization.
15 *
16 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
17 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
18 * WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
19 * IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
21 * THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
22 * INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
23 * DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
24 * WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
26 */
27
28/*
29 * Copyright 1993 Hewlett-Packard Development Company, L.P.
30 *
31 * Permission is hereby granted, free of charge, to any person
32 * obtaining a copy of this software and associated documentation
33 * files (the "Software"), to deal in the Software without
34 * restriction, including without limitation the rights to use, copy,
35 * modify, merge, publish, distribute, sublicense, and/or sell copies
36 * of the Software, and to permit persons to whom the Software is
37 * furnished to do so, subject to the following conditions:
38 *
39 * The above copyright notice and this permission notice shall be
40 * included in all copies or substantial portions of the Software.
41 *
42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
44 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
45 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
46 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
47 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
48 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
49 * SOFTWARE.
50 */
51
52#include "dc21164FromGasSources.h"	// DECchip 21164 specific definitions
53#include "ev5_defs.h"
54#include "fromHudsonOsf.h"		// OSF/1 specific definitions
55#include "fromHudsonMacros.h"		// Global macro definitions
56
57/*
58 * args:
59 *   a0: here
60 *   a1: boot location
61 *   a2: CSERVE_J_KTOPAL
62 *   a3: restrart_pv
63 *   a4: vptb
64 *   a5: my_rpb
65 *
66 * SRM Console Architecture III 3-26
67 */
68
69        .global	palJToSlave
70        .text	3
71palJToSlave:
72
73        ALIGN_BRANCH
74
75        bis	a3, zero, pv
76        bis	zero, zero, t11
77        bis	zero, zero, ra
78
79        /* Point the Vptbr to a2 */
80
81        mtpr	a4, mVptBr	// Load Mbox copy
82        mtpr	a4, iVptBr	// Load Ibox copy
83        STALL			// don't dual issue the load with mtpr -pb
84
85        /* Turn on superpage mapping in the mbox and icsr */
86        lda	t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP>
87        STALL			// don't dual issue the load with mtpr -pb
88        mtpr	t0, mcsr	// Set the super page mode enable bit
89        STALL			// don't dual issue the load with mtpr -pb
90
91        lda	t0, 0(zero)
92        mtpr	t0, dtbAsn
93        mtpr	t0, itbAsn
94
95        LDLI	(t1,0x20000000)
96        STALL			// don't dual issue the load with mtpr -pb
97        mfpr	t0, icsr	// Enable superpage mapping
98        STALL			// don't dual issue the load with mtpr -pb
99        bis	t0, t1, t0
100        mtpr	t0, icsr
101
102        STALL			// Required stall to update chip ...
103        STALL
104        STALL
105        STALL
106        STALL
107
108        ldq_p	s0, PCB_Q_PTBR(a5)
109        sll	s0, VA_S_OFF, s0 // Shift PTBR into position
110        STALL			// don't dual issue the load with mtpr -pb
111        mtpr	s0, ptPtbr	// PHYSICAL MBOX INST -> MT PT20 IN 0,1
112        STALL			// don't dual issue the load with mtpr -pb
113        ldq_p	sp, PCB_Q_KSP(a5)
114
115        mtpr	zero, dtbIa	// Flush all D-stream TB entries
116        mtpr	zero, itbIa	// Flush all I-stream TB entries
117
118        mtpr	a1, excAddr	// Load the dispatch address.
119
120        STALL			// don't dual issue the load with mtpr -pb
121        STALL			// don't dual issue the load with mtpr -pb
122        mtpr	zero, dtbIa	// Flush all D-stream TB entries
123        mtpr	zero, itbIa	// Flush all I-stream TB entries
124        br	zero, 2f
125
126        ALIGN_BLOCK
127
1282:	NOP
129        mtpr	zero, icFlush	// Flush the icache.
130        NOP
131        NOP
132
133        NOP			// Required NOPs ... 1-10
134        NOP
135        NOP
136        NOP
137        NOP
138        NOP
139        NOP
140        NOP
141        NOP
142        NOP
143
144        NOP			// Required NOPs ... 11-20
145        NOP
146        NOP
147        NOP
148        NOP
149        NOP
150        NOP
151        NOP
152        NOP
153        NOP
154
155        NOP			// Required NOPs ... 21-30
156        NOP
157        NOP
158        NOP
159        NOP
160        NOP
161        NOP
162        NOP
163        NOP
164        NOP
165
166        NOP			// Required NOPs ... 31-40
167        NOP
168        NOP
169        NOP
170        NOP
171        NOP
172        NOP
173        NOP
174        NOP
175        NOP
176
177        NOP			// Required NOPs ... 41-44
178        NOP
179        NOP
180        NOP
181
182        hw_rei_stall		// Dispatch to kernel
183
184