xref: /gem5/src/systemc/tests/systemc/misc/unit/control/wait_until/wait_rdy.h

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  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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  Accellera licenses this file to you under the Apache License, Version 2.0
  (the "License"); you may not use this file except in compliance with the
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  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
  implied.  See the License for the specific language governing
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/*****************************************************************************

  wait_rdy.h --

  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15

 *****************************************************************************/

/*****************************************************************************

  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
  changes you are making here.

      Name, Affiliation, Date:
  Description of Modification:

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/******************************************************************************/
/***************************    WAIT_RDY 		 **********************/
/******************************************************************************/

SC_MODULE( WAIT_RDY )
{
    SC_HAS_PROCESS( WAIT_RDY );

    sc_in_clk clk;

  const sc_signal<bool>& ready;	// Input

  WAIT_RDY (   sc_module_name        	NAME,
               sc_clock&		TICK_P,
               const sc_signal<bool>&  	READY )

    :
		ready (READY)

    {
        clk (TICK_P);
		SC_CTHREAD( entry, clk.pos() );
    }

  void entry();

};

void
WAIT_RDY::entry()
{
  while (true) {
    do { wait(); } while (ready != 1);

    cout << sc_time_stamp() << " : "
         << "READY = 1 DETECTED" << endl;
  }
}