sc_signal_rv.hh revision 13214:a37fa0c75211
1/*
2 * Copyright 2018 Google, Inc.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the
10 * documentation and/or other materials provided with the distribution;
11 * neither the name of the copyright holders nor the names of its
12 * contributors may be used to endorse or promote products derived from
13 * this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * Authors: Gabe Black
28 */
29
30#ifndef __SYSTEMC_EXT_CHANNEL_SC_SIGNAL_RV_HH__
31#define __SYSTEMC_EXT_CHANNEL_SC_SIGNAL_RV_HH__
32
33#include "../core/sc_module.hh" // for sc_gen_unique_name
34#include "../core/scheduler.hh"
35#include "../dt/bit/sc_logic.hh"
36#include "../dt/bit/sc_lv.hh"
37#include "sc_signal.hh"
38#include "warn_unimpl.hh"
39
40namespace sc_dt
41{
42
43template <int W>
44class sc_lv;
45
46};
47
48namespace sc_core
49{
50
51class sc_port_base;
52
53template <int W>
54class sc_signal_rv : public sc_signal<sc_dt::sc_lv<W>, SC_MANY_WRITERS>
55{
56  public:
57    sc_signal_rv() : sc_signal<sc_dt::sc_lv<W>, SC_MANY_WRITERS>(
58            sc_gen_unique_name("signal_rv"))
59    {}
60    sc_signal_rv(const char *name) :
61            sc_signal<sc_dt::sc_lv<W>, SC_MANY_WRITERS>(name)
62    {}
63    virtual ~sc_signal_rv() {}
64
65    virtual void
66    register_port(sc_port_base &, const char *)
67    {
68        sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
69    }
70
71    virtual void
72    write(const sc_dt::sc_lv<W> &l)
73    {
74        ::sc_gem5::Process *p = ::sc_gem5::scheduler.current();
75
76        auto it = inputs.find(p);
77        if (it == inputs.end()) {
78            inputs.emplace(p, l);
79            this->request_update();
80        } else if (it->second != l) {
81            it->second = l;
82            this->request_update();
83        }
84    }
85    sc_signal_rv<W> &
86    operator = (const sc_dt::sc_lv<W> &l)
87    {
88        write(l);
89        return *this;
90    }
91    sc_signal_rv<W> &
92    operator = (const sc_signal_rv<W> &r)
93    {
94        write(r.read());
95        return *this;
96    }
97
98    virtual const char *kind() const { return "sc_signal_rv"; }
99
100  protected:
101    virtual void
102    update()
103    {
104        using sc_dt::Log_0;
105        using sc_dt::Log_1;
106        using sc_dt::Log_Z;
107        using sc_dt::Log_X;
108        static sc_dt::sc_logic_value_t merge_table[4][4] = {
109            { Log_0, Log_X, Log_0, Log_X },
110            { Log_X, Log_1, Log_1, Log_X },
111            { Log_0, Log_1, Log_Z, Log_X },
112            { Log_X, Log_X, Log_X, Log_X }
113        };
114
115        // Resolve the inputs, and give the result to the underlying
116        // signal class.
117        for (int i = 0; i < W; i++) {
118            sc_dt::sc_logic_value_t bit = Log_Z;
119            for (auto &input: inputs)
120                bit = merge_table[bit][input.second.get_bit(i)];
121            this->m_new_val.set_bit(i, bit);
122        }
123
124        // Ask the signal to update it's value.
125        sc_signal<sc_dt::sc_lv<W>, SC_MANY_WRITERS>::update();
126    }
127
128  private:
129    // Disabled
130    sc_signal_rv(const sc_signal_rv<W> &) :
131            sc_signal<sc_dt::sc_lv<W>, SC_MANY_WRITERS>()
132    {}
133
134    std::map<::sc_gem5::Process *, sc_dt::sc_lv<W> > inputs;
135};
136
137} // namespace sc_core
138
139#endif  //__SYSTEMC_EXT_CHANNEL_SC_SIGNAL_RV_HH__
140