port.hh revision 13207
1/* 2 * Copyright 2018 Google, Inc. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer; 8 * redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution; 11 * neither the name of the copyright holders nor the names of its 12 * contributors may be used to endorse or promote products derived from 13 * this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 * Authors: Gabe Black 28 */ 29 30#ifndef __SYSTEMC_CORE_PORT_HH__ 31#define __SYSTEMC_CORE_PORT_HH__ 32 33#include <list> 34#include <vector> 35 36#include "systemc/ext/core/sc_interface.hh" 37#include "systemc/ext/core/sc_port.hh" 38 39namespace sc_gem5 40{ 41 42class StaticSensitivityPort; 43class StaticSensitivityFinder; 44 45class Port; 46 47extern std::list<Port *> allPorts; 48 49class Port 50{ 51 private: 52 ::sc_core::sc_port_base *portBase; 53 54 bool finalized; 55 int _maxSize; 56 int _size; 57 58 void finalizePort(StaticSensitivityPort *port); 59 void finalizeFinder(StaticSensitivityFinder *finder); 60 61 void 62 addInterface(::sc_core::sc_interface *i) 63 { 64 _size++; 65 portBase->_gem5AddInterface(i); 66 } 67 68 void 69 addInterfaces(::sc_core::sc_port_base *pb) 70 { 71 for (int i = 0; i < pb->size(); i++) 72 addInterface(pb->_gem5Interface(i)); 73 } 74 75 ::sc_core::sc_interface * 76 getInterface(int i) 77 { 78 return portBase->_gem5Interface(i); 79 } 80 81 struct Binding 82 { 83 explicit Binding(::sc_core::sc_interface *interface) : 84 interface(interface), port(nullptr) 85 {} 86 87 explicit Binding(::sc_core::sc_port_base *port) : 88 interface(nullptr), port(port) 89 {} 90 91 ::sc_core::sc_interface *interface; 92 ::sc_core::sc_port_base *port; 93 }; 94 95 struct Sensitivity 96 { 97 Sensitivity(StaticSensitivityPort *port) : 98 port(port), finder(nullptr) 99 {} 100 101 Sensitivity(StaticSensitivityFinder *finder) : 102 port(nullptr), finder(finder) 103 {} 104 105 StaticSensitivityPort *port; 106 StaticSensitivityFinder *finder; 107 }; 108 109 std::vector<Binding *> bindings; 110 std::vector<Sensitivity *> sensitivities; 111 112 public: 113 static Port * 114 fromPort(const ::sc_core::sc_port_base *pb) 115 { 116 return pb->_gem5Port; 117 } 118 119 ::sc_core::sc_port_base *sc_port_base() { return portBase; } 120 121 Port(::sc_core::sc_port_base *port_base, int max) : 122 portBase(port_base), finalized(false), _maxSize(max), _size(0) 123 { 124 allPorts.push_front(this); 125 } 126 127 void 128 bind(::sc_core::sc_interface *interface) 129 { 130 bindings.push_back(new Binding(interface)); 131 } 132 133 void 134 bind(::sc_core::sc_port_base *port) 135 { 136 bindings.push_back(new Binding(port)); 137 } 138 139 void sensitive(StaticSensitivityPort *port); 140 void sensitive(StaticSensitivityFinder *finder); 141 142 void finalize(); 143 144 int size() { return _size; } 145 int maxSize() { return _maxSize; } 146}; 147 148} // namespace sc_gem5 149 150#endif // __SYSTEMC_CORE_PORT_HH__ 151