system.hh revision 841
1/* 2 * Copyright (c) 2003 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __SYSTEM_HH__ 30#define __SYSTEM_HH__ 31 32#include <string> 33#include <vector> 34 35#include "base/loader/symtab.hh" 36#include "base/statistics.hh" 37#include "cpu/pc_event.hh" 38#include "sim/sim_object.hh" 39#include "sim/sw_context.hh" 40 41class MemoryController; 42class PhysicalMemory; 43class Platform; 44class RemoteGDB; 45class GDBListener; 46 47class ExecContext; 48 49class System : public SimObject 50{ 51 // lisa's binning stuff 52 protected: 53 std::map<const std::string, Statistics::MainBin *> fnBins; 54 std::map<const Addr, SWContext *> swCtxMap; 55 56 public: 57 Statistics::Scalar<Counter> fnCalls; 58 Statistics::MainBin *Kernel; 59 Statistics::MainBin *User; 60 61 Statistics::MainBin * getBin(const std::string &name); 62 virtual bool findCaller(std::string, std::string) const = 0; 63 64 SWContext *findContext(Addr pcb); 65 bool addContext(Addr pcb, SWContext *ctx) { 66 return (swCtxMap.insert(make_pair(pcb, ctx))).second; 67 } 68 void remContext(Addr pcb) { 69 swCtxMap.erase(pcb); 70 return; 71 } 72 73 virtual void dumpState(ExecContext *xc) const = 0; 74 75 virtual void serialize(std::ostream &os); 76 virtual void unserialize(Checkpoint *cp, const std::string §ion); 77 // 78 79 public: 80 const uint64_t init_param; 81 MemoryController *memCtrl; 82 PhysicalMemory *physmem; 83 Platform *platform; 84 bool bin; 85 86 PCEventQueue pcEventQueue; 87 88 std::vector<ExecContext *> execContexts; 89 90 virtual int registerExecContext(ExecContext *xc); 91 virtual void replaceExecContext(int xcIndex, ExecContext *xc); 92 93 public: 94 System(const std::string _name, const uint64_t _init_param, 95 MemoryController *, PhysicalMemory *, const bool); 96 ~System(); 97 98 virtual Addr getKernelStart() const = 0; 99 virtual Addr getKernelEnd() const = 0; 100 virtual Addr getKernelEntry() const = 0; 101 virtual bool breakpoint() = 0; 102 103 public: 104 //////////////////////////////////////////// 105 // 106 // STATIC GLOBAL SYSTEM LIST 107 // 108 //////////////////////////////////////////// 109 110 static std::vector<System *> systemList; 111 static int numSystemsRunning; 112 113 static void printSystems(); 114}; 115 116#endif // __SYSTEM_HH__ 117