system.hh revision 722
1/* 2 * Copyright (c) 2003 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __SYSTEM_HH__ 30#define __SYSTEM_HH__ 31 32#include <string> 33#include <vector> 34 35#include "base/loader/symtab.hh" 36#include "base/statistics.hh" 37#include "cpu/pc_event.hh" 38#include "kern/system_events.hh" 39#include "sim/sim_object.hh" 40#include "sim/sw_context.hh" 41 42class MemoryController; 43class PhysicalMemory; 44class RemoteGDB; 45class GDBListener; 46 47class ExecContext; 48 49class System : public SimObject 50{ 51 // lisa's binning stuff 52 private: 53 std::map<const std::string, Statistics::MainBin *> fnBins; 54 std::map<const Addr, SWContext *> swCtxMap; 55 56 protected: 57 std::vector<FnEvent *> fnEvents; 58 59 public: 60 Statistics::Scalar<> fnCalls; 61 Statistics::MainBin *Kernel; 62 Statistics::MainBin *User; 63 64 Statistics::MainBin * getBin(const std::string &name); 65 bool findCaller(std::string, std::string) const; 66 67 SWContext *findContext(Addr pcb); 68 bool addContext(Addr pcb, SWContext *ctx) { 69 return (swCtxMap.insert(make_pair(pcb, ctx))).second; 70 } 71 void remContext(Addr pcb) { 72 swCtxMap.erase(pcb); 73 return; 74 } 75 void dumpState(ExecContext *xc) const; 76 77 virtual void serialize(std::ostream &os); 78 virtual void unserialize(Checkpoint *cp, const std::string §ion); 79 80 81 private: 82 std::multimap<const std::string, std::string> callerMap; 83 void populateMap(std::string caller, std::string callee); 84// 85 86 public: 87 const uint64_t init_param; 88 MemoryController *memCtrl; 89 PhysicalMemory *physmem; 90 bool bin; 91 std::vector<string> binned_fns; 92 93 PCEventQueue pcEventQueue; 94 95 std::vector<ExecContext *> execContexts; 96 97 virtual int registerExecContext(ExecContext *xc); 98 virtual void replaceExecContext(int xcIndex, ExecContext *xc); 99 100 public: 101 System(const std::string _name, const uint64_t _init_param, 102 MemoryController *, PhysicalMemory *, const bool, 103 const std::vector<string> &binned_fns); 104 ~System(); 105 106 virtual Addr getKernelStart() const = 0; 107 virtual Addr getKernelEnd() const = 0; 108 virtual Addr getKernelEntry() const = 0; 109 virtual bool breakpoint() = 0; 110 111 public: 112 //////////////////////////////////////////// 113 // 114 // STATIC GLOBAL SYSTEM LIST 115 // 116 //////////////////////////////////////////// 117 118 static std::vector<System *> systemList; 119 static int numSystemsRunning; 120 121 static void printSystems(); 122}; 123 124#endif // __SYSTEM_HH__ 125