sim_object.hh revision 4762
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32/* @file 33 * User Console Definitions 34 */ 35 36#ifndef __SIM_OBJECT_HH__ 37#define __SIM_OBJECT_HH__ 38 39#include <map> 40#include <list> 41#include <vector> 42#include <iostream> 43 44#include "params/SimObject.hh" 45#include "sim/serialize.hh" 46#include "sim/startup.hh" 47 48class BaseCPU; 49class Event; 50 51/* 52 * Abstract superclass for simulation objects. Represents things that 53 * correspond to physical components and can be specified via the 54 * config file (CPUs, caches, etc.). 55 */ 56class SimObject : public Serializable, protected StartupCallback 57{ 58 public: 59 enum State { 60 Running, 61 Draining, 62 Drained 63 }; 64 65 private: 66 State state; 67 68 protected: 69 void changeState(State new_state) { state = new_state; } 70 71 public: 72 State getState() { return state; } 73 74 private: 75 typedef std::vector<SimObject *> SimObjectList; 76 77 // list of all instantiated simulation objects 78 static SimObjectList simObjectList; 79 80 protected: 81 const SimObjectParams *_params; 82 83 public: 84 typedef SimObjectParams Params; 85 const Params *params() const { return _params; } 86 SimObject(const Params *_params); 87 SimObject(const std::string &_name); 88 virtual ~SimObject() {} 89 90 virtual const std::string name() const { return params()->name; } 91 92 // initialization pass of all objects. 93 // Gets invoked after construction, before unserialize. 94 virtual void init(); 95 static void initAll(); 96 97 // register statistics for this object 98 virtual void regStats(); 99 virtual void regFormulas(); 100 virtual void resetStats(); 101 102 // static: call reg_stats on all SimObjects 103 static void regAllStats(); 104 105 // static: call resetStats on all SimObjects 106 static void resetAllStats(); 107 108 // static: call nameOut() & serialize() on all SimObjects 109 static void serializeAll(std::ostream &); 110 static void unserializeAll(Checkpoint *cp); 111 112 // Methods to drain objects in order to take checkpoints 113 // Or switch from timing -> atomic memory model 114 // Drain returns 0 if the simobject can drain immediately or 115 // the number of times the drain_event's process function will be called 116 // before the object will be done draining. Normally this should be 1 117 virtual unsigned int drain(Event *drain_event); 118 virtual void resume(); 119 virtual void setMemoryMode(State new_mode); 120 virtual void switchOut(); 121 virtual void takeOverFrom(BaseCPU *cpu); 122 123#ifdef DEBUG 124 public: 125 bool doDebugBreak; 126 static void debugObjectBreak(const std::string &objs); 127#endif 128 129 public: 130 void recordEvent(const std::string &stat); 131}; 132 133#endif // __SIM_OBJECT_HH__ 134