sim_object.hh revision 2797
12SN/A/* 21762SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Nathan Binkert 302SN/A */ 312SN/A 322SN/A/* @file 332SN/A * User Console Definitions 342SN/A */ 352SN/A 362SN/A#ifndef __SIM_OBJECT_HH__ 372SN/A#define __SIM_OBJECT_HH__ 382SN/A 392SN/A#include <map> 402SN/A#include <list> 412SN/A#include <vector> 422SN/A#include <iostream> 432SN/A 4456SN/A#include "sim/serialize.hh" 451127SN/A#include "sim/startup.hh" 462SN/A 472797Sktlim@umich.educlass BaseCPU; 482797Sktlim@umich.educlass Event; 492609SN/A 502SN/A/* 512SN/A * Abstract superclass for simulation objects. Represents things that 522SN/A * correspond to physical components and can be specified via the 532SN/A * config file (CPUs, caches, etc.). 542SN/A */ 551127SN/Aclass SimObject : public Serializable, protected StartupCallback 562SN/A{ 571553SN/A public: 581553SN/A struct Params { 591553SN/A std::string name; 601553SN/A }; 611553SN/A 622797Sktlim@umich.edu enum State { 632797Sktlim@umich.edu Atomic, 642797Sktlim@umich.edu Timing, 652797Sktlim@umich.edu Quiescing, 662797Sktlim@umich.edu QuiescedAtomic, 672797Sktlim@umich.edu QuiescedTiming 682797Sktlim@umich.edu }; 692797Sktlim@umich.edu 70265SN/A protected: 711553SN/A Params *_params; 722797Sktlim@umich.edu State state; 732797Sktlim@umich.edu 742797Sktlim@umich.edu void changeState(State new_state) { state = new_state; } 751553SN/A 761553SN/A public: 771553SN/A const Params *params() const { return _params; } 78265SN/A 792797Sktlim@umich.edu State getState() { return state; } 802797Sktlim@umich.edu 812SN/A private: 822SN/A typedef std::vector<SimObject *> SimObjectList; 832SN/A 842SN/A // list of all instantiated simulation objects 852SN/A static SimObjectList simObjectList; 862SN/A 872SN/A public: 881553SN/A SimObject(Params *_params); 892SN/A SimObject(const std::string &_name); 902SN/A 912SN/A virtual ~SimObject() {} 922SN/A 931553SN/A virtual const std::string name() const { return params()->name; } 94265SN/A 951127SN/A // initialization pass of all objects. 961127SN/A // Gets invoked after construction, before unserialize. 97465SN/A virtual void init(); 982499SN/A virtual void connect(); 99465SN/A static void initAll(); 1002499SN/A static void connectAll(); 101465SN/A 1022SN/A // register statistics for this object 1032SN/A virtual void regStats(); 1042SN/A virtual void regFormulas(); 105330SN/A virtual void resetStats(); 1062SN/A 1072SN/A // static: call reg_stats on all SimObjects 1082SN/A static void regAllStats(); 1092SN/A 110330SN/A // static: call resetStats on all SimObjects 111330SN/A static void resetAllStats(); 112330SN/A 113395SN/A // static: call nameOut() & serialize() on all SimObjects 114395SN/A static void serializeAll(std::ostream &); 1152797Sktlim@umich.edu static void unserializeAll(Checkpoint *cp); 116938SN/A 1172609SN/A // Methods to drain objects in order to take checkpoints 1182609SN/A // Or switch from timing -> atomic memory model 1192797Sktlim@umich.edu // Quiesce returns true if the SimObject cannot quiesce immediately. 1202797Sktlim@umich.edu virtual bool quiesce(Event *quiesce_event); 1212797Sktlim@umich.edu virtual void resume(); 1222797Sktlim@umich.edu virtual void setMemoryMode(State new_mode); 1232797Sktlim@umich.edu virtual void switchOut(); 1242797Sktlim@umich.edu virtual void takeOverFrom(BaseCPU *cpu); 1252609SN/A 1261031SN/A#ifdef DEBUG 1271031SN/A public: 1281031SN/A bool doDebugBreak; 1291031SN/A static void debugObjectBreak(const std::string &objs); 1301031SN/A#endif 1311031SN/A 132938SN/A public: 133938SN/A bool doRecordEvent; 134938SN/A void recordEvent(const std::string &stat); 1352SN/A}; 1362SN/A 1372SN/A#endif // __SIM_OBJECT_HH__ 138