sim_object.hh revision 13781
1/* 2 * Copyright (c) 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2001-2005 The Regents of The University of Michigan 15 * Copyright (c) 2010 Advanced Micro Devices, Inc. 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Steve Reinhardt 42 * Nathan Binkert 43 */ 44 45/* @file 46 * User Console Definitions 47 */ 48 49#ifndef __SIM_OBJECT_HH__ 50#define __SIM_OBJECT_HH__ 51 52#include <string> 53#include <vector> 54 55#include "params/SimObject.hh" 56#include "sim/drain.hh" 57#include "sim/eventq.hh" 58#include "sim/eventq_impl.hh" 59#include "sim/port.hh" 60#include "sim/serialize.hh" 61 62class EventManager; 63class ProbeManager; 64 65/** 66 * Abstract superclass for simulation objects. Represents things that 67 * correspond to physical components and can be specified via the 68 * config file (CPUs, caches, etc.). 69 * 70 * SimObject initialization is controlled by the instantiate method in 71 * src/python/m5/simulate.py. There are slightly different 72 * initialization paths when starting the simulation afresh and when 73 * loading from a checkpoint. After instantiation and connecting 74 * ports, simulate.py initializes the object using the following call 75 * sequence: 76 * 77 * <ol> 78 * <li>SimObject::init() 79 * <li>SimObject::regStats() 80 * <li><ul> 81 * <li>SimObject::initState() if starting afresh. 82 * <li>SimObject::loadState() if restoring from a checkpoint. 83 * </ul> 84 * <li>SimObject::resetStats() 85 * <li>SimObject::startup() 86 * <li>Drainable::drainResume() if resuming from a checkpoint. 87 * </ol> 88 * 89 * @note Whenever a method is called on all objects in the simulator's 90 * object tree (e.g., init(), startup(), or loadState()), a pre-order 91 * depth-first traversal is performed (see descendants() in 92 * SimObject.py). This has the effect of calling the method on the 93 * parent node <i>before</i> its children. 94 */ 95class SimObject : public EventManager, public Serializable, public Drainable 96{ 97 private: 98 typedef std::vector<SimObject *> SimObjectList; 99 100 /** List of all instantiated simulation objects. */ 101 static SimObjectList simObjectList; 102 103 /** Manager coordinates hooking up probe points with listeners. */ 104 ProbeManager *probeManager; 105 106 protected: 107 /** Cached copy of the object parameters. */ 108 const SimObjectParams *_params; 109 110 public: 111 typedef SimObjectParams Params; 112 const Params *params() const { return _params; } 113 SimObject(const Params *_params); 114 virtual ~SimObject(); 115 116 public: 117 118 virtual const std::string name() const { return params()->name; } 119 120 /** 121 * init() is called after all C++ SimObjects have been created and 122 * all ports are connected. Initializations that are independent 123 * of unserialization but rely on a fully instantiated and 124 * connected SimObject graph should be done here. 125 */ 126 virtual void init(); 127 128 /** 129 * loadState() is called on each SimObject when restoring from a 130 * checkpoint. The default implementation simply calls 131 * unserialize() if there is a corresponding section in the 132 * checkpoint. However, objects can override loadState() to get 133 * other behaviors, e.g., doing other programmed initializations 134 * after unserialize(), or complaining if no checkpoint section is 135 * found. 136 * 137 * @param cp Checkpoint to restore the state from. 138 */ 139 virtual void loadState(CheckpointIn &cp); 140 141 /** 142 * initState() is called on each SimObject when *not* restoring 143 * from a checkpoint. This provides a hook for state 144 * initializations that are only required for a "cold start". 145 */ 146 virtual void initState(); 147 148 /** 149 * Register statistics for this object. 150 */ 151 virtual void regStats(); 152 153 /** 154 * Reset statistics associated with this object. 155 */ 156 virtual void resetStats(); 157 158 /** 159 * Register probe points for this object. 160 */ 161 virtual void regProbePoints(); 162 163 /** 164 * Register probe listeners for this object. 165 */ 166 virtual void regProbeListeners(); 167 168 /** 169 * Get the probe manager for this object. 170 */ 171 ProbeManager *getProbeManager(); 172 173 /** 174 * Get a port with a given name and index. This is used at binding time 175 * and returns a reference to a protocol-agnostic port. 176 * 177 * @param if_name Port name 178 * @param idx Index in the case of a VectorPort 179 * 180 * @return A reference to the given port 181 */ 182 virtual Port &getPort(const std::string &if_name, 183 PortID idx=InvalidPortID); 184 185 /** 186 * startup() is the final initialization call before simulation. 187 * All state is initialized (including unserialized state, if any, 188 * such as the curTick() value), so this is the appropriate place to 189 * schedule initial event(s) for objects that need them. 190 */ 191 virtual void startup(); 192 193 /** 194 * Provide a default implementation of the drain interface for 195 * objects that don't need draining. 196 */ 197 DrainState drain() override { return DrainState::Drained; } 198 199 /** 200 * Write back dirty buffers to memory using functional writes. 201 * 202 * After returning, an object implementing this method should have 203 * written all its dirty data back to memory. This method is 204 * typically used to prepare a system with caches for 205 * checkpointing. 206 */ 207 virtual void memWriteback() {}; 208 209 /** 210 * Invalidate the contents of memory buffers. 211 * 212 * When the switching to hardware virtualized CPU models, we need 213 * to make sure that we don't have any cached state in the system 214 * that might become stale when we return. This method is used to 215 * flush all such state back to main memory. 216 * 217 * @warn This does <i>not</i> cause any dirty state to be written 218 * back to memory. 219 */ 220 virtual void memInvalidate() {}; 221 222 void serialize(CheckpointOut &cp) const override {}; 223 void unserialize(CheckpointIn &cp) override {}; 224 225 /** 226 * Serialize all SimObjects in the system. 227 */ 228 static void serializeAll(CheckpointOut &cp); 229 230#ifdef DEBUG 231 public: 232 bool doDebugBreak; 233 static void debugObjectBreak(const std::string &objs); 234#endif 235 236 /** 237 * Find the SimObject with the given name and return a pointer to 238 * it. Primarily used for interactive debugging. Argument is 239 * char* rather than std::string to make it callable from gdb. 240 */ 241 static SimObject *find(const char *name); 242}; 243 244/** 245 * Base class to wrap object resolving functionality. 246 * 247 * This can be provided to the serialization framework to allow it to 248 * map object names onto C++ objects. 249 */ 250class SimObjectResolver 251{ 252 public: 253 virtual ~SimObjectResolver() { } 254 255 // Find a SimObject given a full path name 256 virtual SimObject *resolveSimObject(const std::string &name) = 0; 257}; 258 259#ifdef DEBUG 260void debugObjectBreak(const char *objs); 261#endif 262 263#endif // __SIM_OBJECT_HH__ 264