sim_object.cc revision 8232:b28d06a175be
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2010 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Steve Reinhardt 30 * Nathan Binkert 31 */ 32 33#include <cassert> 34 35#include "base/callback.hh" 36#include "base/inifile.hh" 37#include "base/match.hh" 38#include "base/misc.hh" 39#include "base/trace.hh" 40#include "base/types.hh" 41#include "debug/Config.hh" 42#include "sim/sim_object.hh" 43#include "sim/stats.hh" 44 45using namespace std; 46 47 48//////////////////////////////////////////////////////////////////////// 49// 50// SimObject member definitions 51// 52//////////////////////////////////////////////////////////////////////// 53 54// 55// static list of all SimObjects, used for initialization etc. 56// 57SimObject::SimObjectList SimObject::simObjectList; 58 59// 60// SimObject constructor: used to maintain static simObjectList 61// 62SimObject::SimObject(const Params *p) 63 : EventManager(p->eventq), _params(p) 64{ 65#ifdef DEBUG 66 doDebugBreak = false; 67#endif 68 69 simObjectList.push_back(this); 70 state = Running; 71} 72 73void 74SimObject::init() 75{ 76} 77 78void 79SimObject::loadState(Checkpoint *cp) 80{ 81 if (cp->sectionExists(name())) 82 unserialize(cp, name()); 83} 84 85void 86SimObject::initState() 87{ 88} 89 90void 91SimObject::startup() 92{ 93} 94 95// 96// no default statistics, so nothing to do in base implementation 97// 98void 99SimObject::regStats() 100{ 101} 102 103void 104SimObject::regFormulas() 105{ 106} 107 108void 109SimObject::resetStats() 110{ 111} 112 113// 114// static function: serialize all SimObjects. 115// 116void 117SimObject::serializeAll(ostream &os) 118{ 119 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 120 SimObjectList::reverse_iterator rend = simObjectList.rend(); 121 122 for (; ri != rend; ++ri) { 123 SimObject *obj = *ri; 124 obj->nameOut(os); 125 obj->serialize(os); 126 } 127} 128 129void 130SimObject::unserializeAll(Checkpoint *cp) 131{ 132 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 133 SimObjectList::reverse_iterator rend = simObjectList.rend(); 134 135 for (; ri != rend; ++ri) { 136 SimObject *obj = *ri; 137 DPRINTFR(Config, "Unserializing '%s'\n", 138 obj->name()); 139 if(cp->sectionExists(obj->name())) 140 obj->unserialize(cp, obj->name()); 141 else 142 warn("Not unserializing '%s': no section found in checkpoint.\n", 143 obj->name()); 144 } 145} 146 147 148 149#ifdef DEBUG 150// 151// static function: flag which objects should have the debugger break 152// 153void 154SimObject::debugObjectBreak(const string &objs) 155{ 156 SimObjectList::const_iterator i = simObjectList.begin(); 157 SimObjectList::const_iterator end = simObjectList.end(); 158 159 ObjectMatch match(objs); 160 for (; i != end; ++i) { 161 SimObject *obj = *i; 162 obj->doDebugBreak = match.match(obj->name()); 163 } 164} 165 166void 167debugObjectBreak(const char *objs) 168{ 169 SimObject::debugObjectBreak(string(objs)); 170} 171#endif 172 173unsigned int 174SimObject::drain(Event *drain_event) 175{ 176 state = Drained; 177 return 0; 178} 179 180void 181SimObject::resume() 182{ 183 state = Running; 184} 185 186void 187SimObject::setMemoryMode(State new_mode) 188{ 189 panic("setMemoryMode() should only be called on systems"); 190} 191 192void 193SimObject::switchOut() 194{ 195 panic("Unimplemented!"); 196} 197 198void 199SimObject::takeOverFrom(BaseCPU *cpu) 200{ 201 panic("Unimplemented!"); 202} 203 204 205SimObject * 206SimObject::find(const char *name) 207{ 208 SimObjectList::const_iterator i = simObjectList.begin(); 209 SimObjectList::const_iterator end = simObjectList.end(); 210 211 for (; i != end; ++i) { 212 SimObject *obj = *i; 213 if (obj->name() == name) 214 return obj; 215 } 216 217 return NULL; 218} 219