sim_object.cc revision 5034:6186ef720dd4
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32#include <assert.h> 33 34#include "base/callback.hh" 35#include "base/inifile.hh" 36#include "base/match.hh" 37#include "base/misc.hh" 38#include "base/trace.hh" 39#include "base/stats/events.hh" 40#include "sim/host.hh" 41#include "sim/sim_object.hh" 42#include "sim/stats.hh" 43 44using namespace std; 45 46 47//////////////////////////////////////////////////////////////////////// 48// 49// SimObject member definitions 50// 51//////////////////////////////////////////////////////////////////////// 52 53// 54// static list of all SimObjects, used for initialization etc. 55// 56SimObject::SimObjectList SimObject::simObjectList; 57 58// 59// SimObject constructor: used to maintain static simObjectList 60// 61SimObject::SimObject(const Params *p) 62 : _params(p) 63{ 64#ifdef DEBUG 65 doDebugBreak = false; 66#endif 67 68 simObjectList.push_back(this); 69 state = Running; 70} 71 72SimObjectParams * 73SimObject::makeParams(const std::string &name) 74{ 75 SimObjectParams *params = new SimObjectParams; 76 params->name = name; 77 return params; 78} 79 80void 81SimObject::init() 82{ 83} 84 85// 86// no default statistics, so nothing to do in base implementation 87// 88void 89SimObject::regStats() 90{ 91} 92 93void 94SimObject::regFormulas() 95{ 96} 97 98void 99SimObject::resetStats() 100{ 101} 102 103// 104// static function: 105// call regStats() on all SimObjects and then regFormulas() on all 106// SimObjects. 107// 108struct SimObjectResetCB : public Callback 109{ 110 virtual void process() { SimObject::resetAllStats(); } 111}; 112 113namespace { 114 static SimObjectResetCB StatResetCB; 115} 116 117void 118SimObject::regAllStats() 119{ 120 SimObjectList::iterator i; 121 SimObjectList::iterator end = simObjectList.end(); 122 123 /** 124 * @todo change cprintfs to DPRINTFs 125 */ 126 for (i = simObjectList.begin(); i != end; ++i) { 127#ifdef STAT_DEBUG 128 cprintf("registering stats for %s\n", (*i)->name()); 129#endif 130 (*i)->regStats(); 131 } 132 133 for (i = simObjectList.begin(); i != end; ++i) { 134#ifdef STAT_DEBUG 135 cprintf("registering formulas for %s\n", (*i)->name()); 136#endif 137 (*i)->regFormulas(); 138 } 139 140 Stats::registerResetCallback(&StatResetCB); 141} 142 143// 144// static function: call init() on all SimObjects. 145// 146void 147SimObject::initAll() 148{ 149 SimObjectList::iterator i = simObjectList.begin(); 150 SimObjectList::iterator end = simObjectList.end(); 151 152 for (; i != end; ++i) { 153 SimObject *obj = *i; 154 obj->init(); 155 } 156} 157 158// 159// static function: call resetStats() on all SimObjects. 160// 161void 162SimObject::resetAllStats() 163{ 164 SimObjectList::iterator i = simObjectList.begin(); 165 SimObjectList::iterator end = simObjectList.end(); 166 167 for (; i != end; ++i) { 168 SimObject *obj = *i; 169 obj->resetStats(); 170 } 171} 172 173// 174// static function: serialize all SimObjects. 175// 176void 177SimObject::serializeAll(ostream &os) 178{ 179 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 180 SimObjectList::reverse_iterator rend = simObjectList.rend(); 181 182 for (; ri != rend; ++ri) { 183 SimObject *obj = *ri; 184 obj->nameOut(os); 185 obj->serialize(os); 186 } 187} 188 189void 190SimObject::unserializeAll(Checkpoint *cp) 191{ 192 SimObjectList::reverse_iterator ri = simObjectList.rbegin(); 193 SimObjectList::reverse_iterator rend = simObjectList.rend(); 194 195 for (; ri != rend; ++ri) { 196 SimObject *obj = *ri; 197 DPRINTFR(Config, "Unserializing '%s'\n", 198 obj->name()); 199 if(cp->sectionExists(obj->name())) 200 obj->unserialize(cp, obj->name()); 201 else 202 warn("Not unserializing '%s': no section found in checkpoint.\n", 203 obj->name()); 204 } 205} 206 207#ifdef DEBUG 208// 209// static function: flag which objects should have the debugger break 210// 211void 212SimObject::debugObjectBreak(const string &objs) 213{ 214 SimObjectList::const_iterator i = simObjectList.begin(); 215 SimObjectList::const_iterator end = simObjectList.end(); 216 217 ObjectMatch match(objs); 218 for (; i != end; ++i) { 219 SimObject *obj = *i; 220 obj->doDebugBreak = match.match(obj->name()); 221 } 222} 223 224void 225debugObjectBreak(const char *objs) 226{ 227 SimObject::debugObjectBreak(string(objs)); 228} 229#endif 230 231void 232SimObject::recordEvent(const std::string &stat) 233{ 234 Stats::recordEvent(stat); 235} 236 237unsigned int 238SimObject::drain(Event *drain_event) 239{ 240 state = Drained; 241 return 0; 242} 243 244void 245SimObject::resume() 246{ 247 state = Running; 248} 249 250void 251SimObject::setMemoryMode(State new_mode) 252{ 253 panic("setMemoryMode() should only be called on systems"); 254} 255 256void 257SimObject::switchOut() 258{ 259 panic("Unimplemented!"); 260} 261 262void 263SimObject::takeOverFrom(BaseCPU *cpu) 264{ 265 panic("Unimplemented!"); 266} 267