core.hh revision 12980
14123Sbinkertn@umich.edu/* 24123Sbinkertn@umich.edu * Copyright (c) 2006 The Regents of The University of Michigan 39983Sstever@gmail.com * Copyright (c) 2013 Advanced Micro Devices, Inc. 49983Sstever@gmail.com * Copyright (c) 2013 Mark D. Hill and David A. Wood 54123Sbinkertn@umich.edu * All rights reserved. 64123Sbinkertn@umich.edu * 74123Sbinkertn@umich.edu * Redistribution and use in source and binary forms, with or without 84123Sbinkertn@umich.edu * modification, are permitted provided that the following conditions are 94123Sbinkertn@umich.edu * met: redistributions of source code must retain the above copyright 104123Sbinkertn@umich.edu * notice, this list of conditions and the following disclaimer; 114123Sbinkertn@umich.edu * redistributions in binary form must reproduce the above copyright 124123Sbinkertn@umich.edu * notice, this list of conditions and the following disclaimer in the 134123Sbinkertn@umich.edu * documentation and/or other materials provided with the distribution; 144123Sbinkertn@umich.edu * neither the name of the copyright holders nor the names of its 154123Sbinkertn@umich.edu * contributors may be used to endorse or promote products derived from 164123Sbinkertn@umich.edu * this software without specific prior written permission. 174123Sbinkertn@umich.edu * 184123Sbinkertn@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 194123Sbinkertn@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 204123Sbinkertn@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 214123Sbinkertn@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 224123Sbinkertn@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 234123Sbinkertn@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 244123Sbinkertn@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 254123Sbinkertn@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 264123Sbinkertn@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 274123Sbinkertn@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 284123Sbinkertn@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 294123Sbinkertn@umich.edu * 304123Sbinkertn@umich.edu * Authors: Nathan Binkert 314123Sbinkertn@umich.edu * Steve Reinhardt 324123Sbinkertn@umich.edu */ 334123Sbinkertn@umich.edu 344167Sbinkertn@umich.edu#ifndef __SIM_CORE_HH__ 354167Sbinkertn@umich.edu#define __SIM_CORE_HH__ 364167Sbinkertn@umich.edu 378274SAli.Saidi@ARM.com/** @file This header provides some core simulator functionality such as time 388274SAli.Saidi@ARM.com * information, output directory and exit events 398274SAli.Saidi@ARM.com */ 408274SAli.Saidi@ARM.com 414123Sbinkertn@umich.edu#include <string> 424123Sbinkertn@umich.edu 436214Snate@binkert.org#include "base/types.hh" 449356Snilay@cs.wisc.edu#include "sim/eventq.hh" 454123Sbinkertn@umich.edu 464167Sbinkertn@umich.edu/// The universal simulation clock. 479983Sstever@gmail.cominline Tick curTick() { return _curEventQueue->getCurTick(); } 487823Ssteve.reinhardt@amd.com 494167Sbinkertn@umich.educonst Tick retryTime = 1000; 504167Sbinkertn@umich.edu 518274SAli.Saidi@ARM.com/// These are variables that are set based on the simulator frequency 528274SAli.Saidi@ARM.com///@{ 537064Snate@binkert.orgnamespace SimClock { 548274SAli.Saidi@ARM.comextern Tick Frequency; ///< The number of ticks that equal one second 554167Sbinkertn@umich.edu 564167Sbinkertn@umich.edunamespace Float { 574167Sbinkertn@umich.edu 588274SAli.Saidi@ARM.com/** These variables equal the number of ticks in the unit of time they're 598274SAli.Saidi@ARM.com * named after in a double. 608274SAli.Saidi@ARM.com * @{ 618274SAli.Saidi@ARM.com */ 628274SAli.Saidi@ARM.comextern double s; ///< second 638274SAli.Saidi@ARM.comextern double ms; ///< millisecond 648274SAli.Saidi@ARM.comextern double us; ///< microsecond 658274SAli.Saidi@ARM.comextern double ns; ///< nanosecond 668274SAli.Saidi@ARM.comextern double ps; ///< picosecond 678274SAli.Saidi@ARM.com/** @} */ 688274SAli.Saidi@ARM.com 698274SAli.Saidi@ARM.com/** These variables the inverse of above. They're all < 1. 708274SAli.Saidi@ARM.com * @{ 718274SAli.Saidi@ARM.com */ 728274SAli.Saidi@ARM.comextern double Hz; ///< Hz 738274SAli.Saidi@ARM.comextern double kHz; ///< kHz 748274SAli.Saidi@ARM.comextern double MHz; ///< MHz 7512980Sgabeblack@google.comextern double GHz; ///< GHz 768274SAli.Saidi@ARM.com/** @}*/ 777811Ssteve.reinhardt@amd.com} // namespace Float 784167Sbinkertn@umich.edu 798274SAli.Saidi@ARM.com/** These variables equal the number of ticks in the unit of time they're 808274SAli.Saidi@ARM.com * named after in a 64 bit integer. 818274SAli.Saidi@ARM.com * 828274SAli.Saidi@ARM.com * @{ 838274SAli.Saidi@ARM.com */ 844167Sbinkertn@umich.edunamespace Int { 858274SAli.Saidi@ARM.comextern Tick s; ///< second 868274SAli.Saidi@ARM.comextern Tick ms; ///< millisecond 878274SAli.Saidi@ARM.comextern Tick us; ///< microsecond 888274SAli.Saidi@ARM.comextern Tick ns; ///< nanosecond 898274SAli.Saidi@ARM.comextern Tick ps; ///< picosecond 908274SAli.Saidi@ARM.com/** @} */ 917811Ssteve.reinhardt@amd.com} // namespace Int 927811Ssteve.reinhardt@amd.com} // namespace SimClock 938274SAli.Saidi@ARM.com/** @} */ 944167Sbinkertn@umich.eduvoid setClockFrequency(Tick ticksPerSecond); 954167Sbinkertn@umich.edu 964123Sbinkertn@umich.eduvoid setOutputDir(const std::string &dir); 974123Sbinkertn@umich.edu 988737Skoansin.tan@gmail.comclass Callback; 994123Sbinkertn@umich.eduvoid registerExitCallback(Callback *callback); 1004123Sbinkertn@umich.eduvoid doExitCleanup(); 1014167Sbinkertn@umich.edu 1024167Sbinkertn@umich.edu#endif /* __SIM_CORE_HH__ */ 103