System.py revision 9313
1# Copyright (c) 2005-2007 The Regents of The University of Michigan 2# Copyright (c) 2011 Regents of the University of California 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; 9# redistributions in binary form must reproduce the above copyright 10# notice, this list of conditions and the following disclaimer in the 11# documentation and/or other materials provided with the distribution; 12# neither the name of the copyright holders nor the names of its 13# contributors may be used to endorse or promote products derived from 14# this software without specific prior written permission. 15# 16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27# 28# Authors: Nathan Binkert 29# Rick Strong 30 31from m5.SimObject import SimObject 32from m5.defines import buildEnv 33from m5.params import * 34from m5.proxy import * 35 36from SimpleMemory import * 37 38class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing'] 39 40class System(MemObject): 41 type = 'System' 42 system_port = MasterPort("System port") 43 44 # Override the clock from the ClockedObject which looks at the 45 # parent clock by default. The 1 GHz default system clock serves 46 # as a start for the modules that rely on the parent to provide 47 # the clock. 48 clock = '1GHz' 49 50 @classmethod 51 def export_method_cxx_predecls(cls, code): 52 code('#include "sim/system.hh"') 53 54 @classmethod 55 def export_methods(cls, code): 56 code(''' 57 Enums::MemoryMode getMemoryMode(); 58 void setMemoryMode(Enums::MemoryMode mode); 59''') 60 61 memories = VectorParam.AbstractMemory(Self.all, 62 "All memories in the system") 63 mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in") 64 work_item_id = Param.Int(-1, "specific work item id") 65 num_work_ids = Param.Int(16, "Number of distinct work item types") 66 work_begin_cpu_id_exit = Param.Int(-1, 67 "work started on specific id, now exit simulation") 68 work_begin_ckpt_count = Param.Counter(0, 69 "create checkpoint when work items begin count value is reached") 70 work_begin_exit_count = Param.Counter(0, 71 "exit simulation when work items begin count value is reached") 72 work_end_ckpt_count = Param.Counter(0, 73 "create checkpoint when work items end count value is reached") 74 work_end_exit_count = Param.Counter(0, 75 "exit simulation when work items end count value is reached") 76 work_cpus_ckpt_count = Param.Counter(0, 77 "create checkpoint when active cpu count value is reached") 78 79 init_param = Param.UInt64(0, "numerical value to pass into simulator") 80 boot_osflags = Param.String("a", "boot flags to pass to the kernel") 81 kernel = Param.String("", "file that contains the kernel code") 82 readfile = Param.String("", "file to read startup script from") 83 symbolfile = Param.String("", "file to get the symbols from") 84 load_addr_mask = Param.UInt64(0xffffffffff, 85 "Address to mask loading binaries with"); 86