System.py revision 9814
112726Snikos.nikoleris@arm.com# Copyright (c) 2005-2007 The Regents of The University of Michigan 29288SN/A# Copyright (c) 2011 Regents of the University of California 39288SN/A# All rights reserved. 49288SN/A# 59288SN/A# Redistribution and use in source and binary forms, with or without 69288SN/A# modification, are permitted provided that the following conditions are 79288SN/A# met: redistributions of source code must retain the above copyright 89288SN/A# notice, this list of conditions and the following disclaimer; 99288SN/A# redistributions in binary form must reproduce the above copyright 109288SN/A# notice, this list of conditions and the following disclaimer in the 119288SN/A# documentation and/or other materials provided with the distribution; 129288SN/A# neither the name of the copyright holders nor the names of its 134486SN/A# contributors may be used to endorse or promote products derived from 144486SN/A# this software without specific prior written permission. 154486SN/A# 164486SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 174486SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 184486SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 194486SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 204486SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 214486SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224486SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 234486SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244486SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254486SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264486SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274486SN/A# 284486SN/A# Authors: Nathan Binkert 294486SN/A# Rick Strong 304486SN/A 314486SN/Afrom m5.SimObject import SimObject 324486SN/Afrom m5.defines import buildEnv 334486SN/Afrom m5.params import * 344486SN/Afrom m5.proxy import * 354486SN/A 364486SN/Afrom SimpleMemory import * 374486SN/A 384486SN/Aclass MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing', 394486SN/A 'atomic_noncaching'] 4011053Sandreas.hansson@arm.com 414486SN/Aclass System(MemObject): 423102SN/A type = 'System' 438833SN/A cxx_header = "sim/system.hh" 4413352Snikos.nikoleris@arm.com system_port = MasterPort("System port") 452826SN/A 468831SN/A @classmethod 4712600Sodanrc@yahoo.com.br def export_method_cxx_predecls(cls, code): 489796SN/A code('#include "sim/system.hh"') 491615SN/A 5012724Snikos.nikoleris@arm.com @classmethod 5112724Snikos.nikoleris@arm.com def export_methods(cls, code): 5212724Snikos.nikoleris@arm.com code(''' 5312724Snikos.nikoleris@arm.com Enums::MemoryMode getMemoryMode() const; 5412724Snikos.nikoleris@arm.com void setMemoryMode(Enums::MemoryMode mode); 5513352Snikos.nikoleris@arm.com''') 5613352Snikos.nikoleris@arm.com 5713352Snikos.nikoleris@arm.com memories = VectorParam.AbstractMemory(Self.all, 5813352Snikos.nikoleris@arm.com "All memories in the system") 5913352Snikos.nikoleris@arm.com mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in") 6013352Snikos.nikoleris@arm.com 6113352Snikos.nikoleris@arm.com # The memory ranges are to be populated when creating the system 6213352Snikos.nikoleris@arm.com # such that these can be passed from the I/O subsystem through an 6313352Snikos.nikoleris@arm.com # I/O bridge or cache 6413352Snikos.nikoleris@arm.com mem_ranges = VectorParam.AddrRange([], "Ranges that constitute main memory") 6513352Snikos.nikoleris@arm.com 6613352Snikos.nikoleris@arm.com cache_line_size = Param.Unsigned(64, "Cache line size in bytes") 6713352Snikos.nikoleris@arm.com 6813352Snikos.nikoleris@arm.com work_item_id = Param.Int(-1, "specific work item id") 6913352Snikos.nikoleris@arm.com num_work_ids = Param.Int(16, "Number of distinct work item types") 7013352Snikos.nikoleris@arm.com work_begin_cpu_id_exit = Param.Int(-1, 7113352Snikos.nikoleris@arm.com "work started on specific id, now exit simulation") 7213352Snikos.nikoleris@arm.com work_begin_ckpt_count = Param.Counter(0, 7312724Snikos.nikoleris@arm.com "create checkpoint when work items begin count value is reached") 742826SN/A work_begin_exit_count = Param.Counter(0, 751366SN/A "exit simulation when work items begin count value is reached") 7611053Sandreas.hansson@arm.com work_end_ckpt_count = Param.Counter(0, 779338SN/A "create checkpoint when work items end count value is reached") 7810816SN/A work_end_exit_count = Param.Counter(0, 7910816SN/A "exit simulation when work items end count value is reached") 8010816SN/A work_cpus_ckpt_count = Param.Counter(0, 8110816SN/A "create checkpoint when active cpu count value is reached") 8211722Ssophiane.senni@gmail.com 8311722Ssophiane.senni@gmail.com init_param = Param.UInt64(0, "numerical value to pass into simulator") 8410816SN/A boot_osflags = Param.String("a", "boot flags to pass to the kernel") 8510816SN/A kernel = Param.String("", "file that contains the kernel code") 8612513Sodanrc@yahoo.com.br readfile = Param.String("", "file to read startup script from") 8712513Sodanrc@yahoo.com.br symbolfile = Param.String("", "file to get the symbols from") 8812513Sodanrc@yahoo.com.br load_addr_mask = Param.UInt64(0xffffffffff, 891310SN/A "Address to mask loading binaries with"); 9010816SN/A