tport.hh revision 5740:983b71bfc1bd 
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31#ifndef __MEM_TPORT_HH__
32#define __MEM_TPORT_HH__
33
34/**
35 * @file
36 *
37 * Declaration of SimpleTimingPort.
38 */
39
40#include "mem/port.hh"
41#include "sim/eventq.hh"
42#include <list>
43#include <string>
44
45/**
46 * A simple port for interfacing objects that basically have only
47 * functional memory behavior (e.g. I/O devices) to the memory system.
48 * Both timing and functional accesses are implemented in terms of
49 * atomic accesses.  A derived port class thus only needs to provide
50 * recvAtomic() to support all memory access modes.
51 *
52 * The tricky part is handling recvTiming(), where the response must
53 * be scheduled separately via a later call to sendTiming().  This
54 * feature is handled by scheduling an internal event that calls
55 * sendTiming() after a delay, and optionally rescheduling the
56 * response if it is nacked.
57 */
58class SimpleTimingPort : public Port
59{
60  protected:
61    /** A deferred packet, buffered to transmit later. */
62    class DeferredPacket {
63      public:
64        Tick tick;      ///< The tick when the packet is ready to transmit
65        PacketPtr pkt;  ///< Pointer to the packet to transmit
66        DeferredPacket(Tick t, PacketPtr p)
67            : tick(t), pkt(p)
68        {}
69    };
70
71    typedef std::list<DeferredPacket> DeferredPacketList;
72    typedef std::list<DeferredPacket>::iterator DeferredPacketIterator;
73
74    /** A list of outgoing timing response packets that haven't been
75     * serviced yet. */
76    DeferredPacketList transmitList;
77
78    /** This function attempts to send deferred packets.  Scheduled to
79     * be called in the future via SendEvent. */
80    void processSendEvent();
81
82    /**
83     * This class is used to implemented sendTiming() with a delay. When
84     * a delay is requested a the event is scheduled if it isn't already.
85     * When the event time expires it attempts to send the packet.
86     * If it cannot, the packet sent when recvRetry() is called.
87     **/
88    Event *sendEvent;
89
90    /** If we need to drain, keep the drain event around until we're done
91     * here.*/
92    Event *drainEvent;
93
94    /** Remember whether we're awaiting a retry from the bus. */
95    bool waitingOnRetry;
96
97    /** Check the list of buffered packets against the supplied
98     * functional request. */
99    bool checkFunctional(PacketPtr funcPkt);
100
101    /** Check whether we have a packet ready to go on the transmit list. */
102    bool deferredPacketReady()
103    { return !transmitList.empty() && transmitList.front().tick <= curTick; }
104
105    Tick deferredPacketReadyTime()
106    { return transmitList.empty() ? MaxTick : transmitList.front().tick; }
107
108    void
109    schedSendEvent(Tick when)
110    {
111        if (waitingOnRetry) {
112            assert(!sendEvent->scheduled());
113            return;
114        }
115
116        if (!sendEvent->scheduled()) {
117            schedule(sendEvent, when);
118        } else if (sendEvent->when() > when) {
119            reschedule(sendEvent, when);
120        }
121    }
122
123
124    /** Schedule a sendTiming() event to be called in the future.
125     * @param pkt packet to send
126     * @param absolute time (in ticks) to send packet
127     */
128    void schedSendTiming(PacketPtr pkt, Tick when);
129
130    /** Attempt to send the packet at the head of the deferred packet
131     * list.  Caller must guarantee that the deferred packet list is
132     * non-empty and that the head packet is scheduled for curTick (or
133     * earlier).
134     */
135    void sendDeferredPacket();
136
137    /** This function is notification that the device should attempt to send a
138     * packet again. */
139    virtual void recvRetry();
140
141    /** Implemented using recvAtomic(). */
142    void recvFunctional(PacketPtr pkt);
143
144    /** Implemented using recvAtomic(). */
145    bool recvTiming(PacketPtr pkt);
146
147    /**
148     * Simple ports generally don't care about any status
149     * changes... can always override this in cases where that's not
150     * true. */
151    virtual void recvStatusChange(Status status) { }
152
153
154  public:
155    SimpleTimingPort(std::string pname, MemObject *_owner);
156    ~SimpleTimingPort();
157
158    /** Hook for draining timing accesses from the system.  The
159     * associated SimObject's drain() functions should be implemented
160     * something like this when this class is used:
161     \code
162          PioDevice::drain(Event *de)
163          {
164              unsigned int count;
165              count = SimpleTimingPort->drain(de);
166              if (count)
167                  changeState(Draining);
168              else
169                  changeState(Drained);
170              return count;
171          }
172     \endcode
173    */
174    unsigned int drain(Event *de);
175};
176
177#endif // __MEM_TPORT_HH__
178