xref: /gem5/src/mem/slicc/ast/StallAndWaitStatementAST.py

# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
# Copyright (c) 2009 The Hewlett-Packard Development Company
# Copyright (c) 2010 Advanced Micro Devices, Inc.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
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# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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from slicc.ast.StatementAST import StatementAST

class StallAndWaitStatementAST(StatementAST):
    def __init__(self, slicc, in_port, address):
        super(StatementAST, self).__init__(slicc)
        self.in_port = in_port
        self.address = address

    def __repr__(self):
        return "[StallAndWaitStatementAst: %r]" % self.in_port

    def generate(self, code, return_type):
        self.in_port.assertType("InPort")
        self.address.assertType("Addr")

        in_port_code = self.in_port.var.code
        address_code = self.address.var.code
        code('''
        stallBuffer(&($in_port_code), $address_code);
        $in_port_code.stallMessage($address_code, clockEdge());
        ''')