FuncCallExprAST.py revision 8192
17584SAli.Saidi@arm.com# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 211011SAndreas.Sandberg@ARM.com# Copyright (c) 2009 The Hewlett-Packard Development Company 37584SAli.Saidi@arm.com# All rights reserved. 47584SAli.Saidi@arm.com# 57584SAli.Saidi@arm.com# Redistribution and use in source and binary forms, with or without 67584SAli.Saidi@arm.com# modification, are permitted provided that the following conditions are 77584SAli.Saidi@arm.com# met: redistributions of source code must retain the above copyright 87584SAli.Saidi@arm.com# notice, this list of conditions and the following disclaimer; 97584SAli.Saidi@arm.com# redistributions in binary form must reproduce the above copyright 107584SAli.Saidi@arm.com# notice, this list of conditions and the following disclaimer in the 117584SAli.Saidi@arm.com# documentation and/or other materials provided with the distribution; 127584SAli.Saidi@arm.com# neither the name of the copyright holders nor the names of its 137584SAli.Saidi@arm.com# contributors may be used to endorse or promote products derived from 147584SAli.Saidi@arm.com# this software without specific prior written permission. 157584SAli.Saidi@arm.com# 167584SAli.Saidi@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 177584SAli.Saidi@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 187584SAli.Saidi@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 197584SAli.Saidi@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 207584SAli.Saidi@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 217584SAli.Saidi@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 227584SAli.Saidi@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 237584SAli.Saidi@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 247584SAli.Saidi@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 257584SAli.Saidi@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 267584SAli.Saidi@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 277584SAli.Saidi@arm.com 287584SAli.Saidi@arm.comfrom slicc.ast.ExprAST import ExprAST 297584SAli.Saidi@arm.comfrom slicc.symbols import Func, Type 307584SAli.Saidi@arm.com 317584SAli.Saidi@arm.comclass FuncCallExprAST(ExprAST): 327584SAli.Saidi@arm.com def __init__(self, slicc, proc_name, exprs): 337584SAli.Saidi@arm.com super(FuncCallExprAST, self).__init__(slicc) 347584SAli.Saidi@arm.com self.proc_name = proc_name 357584SAli.Saidi@arm.com self.exprs = exprs 367584SAli.Saidi@arm.com 377584SAli.Saidi@arm.com def __repr__(self): 387584SAli.Saidi@arm.com return "[FuncCallExpr: %s %s]" % (self.proc_name, self.exprs) 397584SAli.Saidi@arm.com 4011421Sdavid.guillen@arm.com def generate(self, code): 4111421Sdavid.guillen@arm.com machine = self.state_machine 427584SAli.Saidi@arm.com 439958Smatt.evans@arm.com if self.proc_name == "DPRINTF": 447584SAli.Saidi@arm.com # Code for inserting the location of the DPRINTF() 457584SAli.Saidi@arm.com # statement in the .sm file in the statement it self. 4611421Sdavid.guillen@arm.com # 'self.exprs[0].location' represents the location. 4711421Sdavid.guillen@arm.com # 'format' represents the second argument of the 4811011SAndreas.Sandberg@ARM.com # original DPRINTF() call. It is left unmodified. 497584SAli.Saidi@arm.com # str_list is used for concatenating the argument 507584SAli.Saidi@arm.com # list following the format specifier. A DPRINTF() 519958Smatt.evans@arm.com # call may or may not contain any arguments following 527584SAli.Saidi@arm.com # the format specifier. These two cases need to be 537584SAli.Saidi@arm.com # handled differently. Hence the check whether or not 547584SAli.Saidi@arm.com # the str_list is empty. 557584SAli.Saidi@arm.com 567584SAli.Saidi@arm.com format = "%s" % (self.exprs[1].inline()) 577584SAli.Saidi@arm.com format_length = len(format) 587584SAli.Saidi@arm.com str_list = [] 597584SAli.Saidi@arm.com 607584SAli.Saidi@arm.com for i in range(2, len(self.exprs)): 617584SAli.Saidi@arm.com str_list.append("%s" % self.exprs[i].inline()) 627584SAli.Saidi@arm.com 638524SAli.Saidi@ARM.com if len(str_list) == 0: 648524SAli.Saidi@ARM.com code('DPRINTF(RubySlicc, "$0: $1")', 658524SAli.Saidi@ARM.com self.exprs[0].location, format[2:format_length-2]) 668524SAli.Saidi@ARM.com else: 678524SAli.Saidi@ARM.com code('DPRINTF(RubySlicc, "$0: $1", $2)', 687584SAli.Saidi@arm.com self.exprs[0].location, format[2:format_length-2], 697584SAli.Saidi@arm.com ', '.join(str_list)) 707584SAli.Saidi@arm.com 719004Skoansin.tan@gmail.com return self.symtab.find("void", Type) 727584SAli.Saidi@arm.com 737584SAli.Saidi@arm.com # hack for adding comments to profileTransition 748060SAli.Saidi@ARM.com if self.proc_name == "APPEND_TRANSITION_COMMENT": 758060SAli.Saidi@ARM.com # FIXME - check for number of parameters 769004Skoansin.tan@gmail.com code("APPEND_TRANSITION_COMMENT($0)", self.exprs[0].inline()) 778060SAli.Saidi@ARM.com return self.symtab.find("void", Type) 788060SAli.Saidi@ARM.com 797584SAli.Saidi@arm.com # Look up the function in the symbol table 807584SAli.Saidi@arm.com func = self.symtab.find(self.proc_name, Func) 817584SAli.Saidi@arm.com 827950SAli.Saidi@ARM.com # Check the types and get the code for the parameters 837950SAli.Saidi@ARM.com if func is None: 847950SAli.Saidi@ARM.com self.error("Unrecognized function name: '%s'", self.proc_name) 857950SAli.Saidi@ARM.com 867950SAli.Saidi@ARM.com if len(self.exprs) != len(func.param_types): 877950SAli.Saidi@ARM.com self.error("Wrong number of arguments passed to function : '%s'" +\ 887950SAli.Saidi@ARM.com " Expected %d, got %d", self.proc_name, 897950SAli.Saidi@ARM.com len(func.param_types), len(self.exprs)) 907950SAli.Saidi@ARM.com 917950SAli.Saidi@ARM.com cvec = [] 927950SAli.Saidi@ARM.com type_vec = [] 937950SAli.Saidi@ARM.com for expr,expected_type in zip(self.exprs, func.param_types): 947950SAli.Saidi@ARM.com # Check the types of the parameter 957950SAli.Saidi@ARM.com actual_type,param_code = expr.inline(True) 967950SAli.Saidi@ARM.com if actual_type != expected_type: 977950SAli.Saidi@ARM.com expr.error("Type mismatch: expected: %s actual: %s" % \ 987950SAli.Saidi@ARM.com (expected_type, actual_type)) 997950SAli.Saidi@ARM.com cvec.append(param_code) 1007950SAli.Saidi@ARM.com type_vec.append(expected_type) 1017950SAli.Saidi@ARM.com 1027950SAli.Saidi@ARM.com # OK, the semantics of "trigger" here is that, ports in the 1038281SAli.Saidi@ARM.com # machine have different priorities. We always check the first 1048281SAli.Saidi@ARM.com # port for doable transitions. If nothing/stalled, we pick one 1058281SAli.Saidi@ARM.com # from the next port. 1068299Schander.sudanthi@arm.com # 1078299Schander.sudanthi@arm.com # One thing we have to be careful as the SLICC protocol 1088299Schander.sudanthi@arm.com # writter is : If a port have two or more transitions can be 1098870SAli.Saidi@ARM.com # picked from in one cycle, they must be independent. 1108870SAli.Saidi@ARM.com # Otherwise, if transition A and B mean to be executed in 1118988SAli.Saidi@ARM.com # sequential, and A get stalled, transition B can be issued 1129958Smatt.evans@arm.com # erroneously. In practice, in most case, there is only one 1139958Smatt.evans@arm.com # transition should be executed in one cycle for a given 1149958Smatt.evans@arm.com # port. So as most of current protocols. 1159958Smatt.evans@arm.com 1169958Smatt.evans@arm.com if self.proc_name == "trigger": 1179958Smatt.evans@arm.com code(''' 1189958Smatt.evans@arm.com{ 1199958Smatt.evans@arm.com Address addr = ${{cvec[1]}}; 1207584SAli.Saidi@arm.com''') 1218299Schander.sudanthi@arm.com if machine.TBEType != None and machine.EntryType != None: 1228299Schander.sudanthi@arm.com code(''' 1239958Smatt.evans@arm.com TransitionResult result = doTransition(${{cvec[0]}}, ${{cvec[2]}}, ${{cvec[3]}}, addr); 1247584SAli.Saidi@arm.com''') 1257584SAli.Saidi@arm.com elif machine.TBEType != None: 1267584SAli.Saidi@arm.com code(''' 1277584SAli.Saidi@arm.com TransitionResult result = doTransition(${{cvec[0]}}, ${{cvec[2]}}, addr); 1287584SAli.Saidi@arm.com''') 1297584SAli.Saidi@arm.com elif machine.EntryType != None: 1307584SAli.Saidi@arm.com code(''' 1317584SAli.Saidi@arm.com TransitionResult result = doTransition(${{cvec[0]}}, ${{cvec[2]}}, addr); 1327584SAli.Saidi@arm.com''') 1337584SAli.Saidi@arm.com else: 1347584SAli.Saidi@arm.com code(''' 1357584SAli.Saidi@arm.com TransitionResult result = doTransition(${{cvec[0]}}, addr); 1367584SAli.Saidi@arm.com''') 1377584SAli.Saidi@arm.com 1387584SAli.Saidi@arm.com code(''' 1397950SAli.Saidi@ARM.com if (result == TransitionResult_Valid) { 1407950SAli.Saidi@ARM.com counter++; 1417950SAli.Saidi@ARM.com continue; // Check the first port again 1427950SAli.Saidi@ARM.com } 1437950SAli.Saidi@ARM.com 1447950SAli.Saidi@ARM.com if (result == TransitionResult_ResourceStall) { 1457950SAli.Saidi@ARM.com g_eventQueue_ptr->scheduleEvent(this, 1); 1467950SAli.Saidi@ARM.com 1477950SAli.Saidi@ARM.com // Cannot do anything with this transition, go check next doable transition (mostly likely of next port) 1487584SAli.Saidi@arm.com } 14912078Sgedare@rtems.org} 15012078Sgedare@rtems.org''') 15112078Sgedare@rtems.org elif self.proc_name == "doubleTrigger": 15212078Sgedare@rtems.org # NOTE: Use the doubleTrigger call with extreme caution 1538281SAli.Saidi@ARM.com # the key to double trigger is the second event triggered 1548281SAli.Saidi@ARM.com # cannot fail becuase the first event cannot be undone 1558281SAli.Saidi@ARM.com assert len(cvec) == 4 1568524SAli.Saidi@ARM.com code(''' 1578524SAli.Saidi@ARM.com{ 1588524SAli.Saidi@ARM.com Address addr1 = ${{cvec[1]}}; 1599958Smatt.evans@arm.com TransitionResult result1 = 1609958Smatt.evans@arm.com doTransition(${{cvec[0]}}, ${machine}_getState(addr1), addr1); 1619958Smatt.evans@arm.com 1629958Smatt.evans@arm.com if (result1 == TransitionResult_Valid) { 1639958Smatt.evans@arm.com //this second event cannont fail because the first event 1649958Smatt.evans@arm.com // already took effect 1659958Smatt.evans@arm.com Address addr2 = ${{cvec[3]}}; 16611011SAndreas.Sandberg@ARM.com TransitionResult result2 = doTransition(${{cvec[2]}}, ${machine}_getState(addr2), addr2); 16711011SAndreas.Sandberg@ARM.com 16811011SAndreas.Sandberg@ARM.com // ensure the event suceeded 16911011SAndreas.Sandberg@ARM.com assert(result2 == TransitionResult_Valid); 17011011SAndreas.Sandberg@ARM.com 17111011SAndreas.Sandberg@ARM.com counter++; 1729958Smatt.evans@arm.com continue; // Check the first port again 17311011SAndreas.Sandberg@ARM.com } 17411011SAndreas.Sandberg@ARM.com 17511011SAndreas.Sandberg@ARM.com if (result1 == TransitionResult_ResourceStall) { 17611011SAndreas.Sandberg@ARM.com g_eventQueue_ptr->scheduleEvent(this, 1); 17711011SAndreas.Sandberg@ARM.com // Cannot do anything with this transition, go check next 17811011SAndreas.Sandberg@ARM.com // doable transition (mostly likely of next port) 17911011SAndreas.Sandberg@ARM.com } 18011011SAndreas.Sandberg@ARM.com} 18111011SAndreas.Sandberg@ARM.com''') 18211011SAndreas.Sandberg@ARM.com elif self.proc_name == "error": 18311011SAndreas.Sandberg@ARM.com code("$0", self.exprs[0].embedError(cvec[0])) 18411011SAndreas.Sandberg@ARM.com elif self.proc_name == "assert": 18511011SAndreas.Sandberg@ARM.com error = self.exprs[0].embedError('"assert failure"') 18611011SAndreas.Sandberg@ARM.com code(''' 18711011SAndreas.Sandberg@ARM.com#ifndef NDEBUG 18811011SAndreas.Sandberg@ARM.comif (!(${{cvec[0]}})) { 1899958Smatt.evans@arm.com $error 19011011SAndreas.Sandberg@ARM.com} 19111011SAndreas.Sandberg@ARM.com#endif 19211011SAndreas.Sandberg@ARM.com''') 1939958Smatt.evans@arm.com 1949958Smatt.evans@arm.com elif self.proc_name == "continueProcessing": 1959958Smatt.evans@arm.com code("counter++;") 1967584SAli.Saidi@arm.com code("continue; // Check the first port again") 1979958Smatt.evans@arm.com 1989958Smatt.evans@arm.com elif self.proc_name == "set_cache_entry": 1997584SAli.Saidi@arm.com code("set_cache_entry(m_cache_entry_ptr, %s);" %(cvec[0])); 2007584SAli.Saidi@arm.com elif self.proc_name == "unset_cache_entry": 2017584SAli.Saidi@arm.com code("unset_cache_entry(m_cache_entry_ptr);"); 2027584SAli.Saidi@arm.com elif self.proc_name == "set_tbe": 2037584SAli.Saidi@arm.com code("set_tbe(m_tbe_ptr, %s);" %(cvec[0])); 2047584SAli.Saidi@arm.com elif self.proc_name == "unset_tbe": 2057584SAli.Saidi@arm.com code("unset_tbe(m_tbe_ptr);"); 20610905Sandreas.sandberg@arm.com 2077584SAli.Saidi@arm.com else: 2088281SAli.Saidi@ARM.com # Normal function 2097584SAli.Saidi@arm.com 2107584SAli.Saidi@arm.com # if the func is internal to the chip but not the machine 2117584SAli.Saidi@arm.com # then it can only be accessed through the chip pointer 21210905Sandreas.sandberg@arm.com internal = "" 2137584SAli.Saidi@arm.com if "external" not in func and not func.isInternalMachineFunc: 2148281SAli.Saidi@ARM.com internal = "m_chip_ptr->" 2157584SAli.Saidi@arm.com 2167584SAli.Saidi@arm.com params = "" 21711011SAndreas.Sandberg@ARM.com first_param = True 21811011SAndreas.Sandberg@ARM.com 21911011SAndreas.Sandberg@ARM.com for (param_code, type) in zip(cvec, type_vec): 22011011SAndreas.Sandberg@ARM.com if first_param: 22111011SAndreas.Sandberg@ARM.com params = str(param_code) 22211011SAndreas.Sandberg@ARM.com first_param = False 22311011SAndreas.Sandberg@ARM.com else: 22411011SAndreas.Sandberg@ARM.com params += ', ' 22511011SAndreas.Sandberg@ARM.com params += str(param_code); 22611011SAndreas.Sandberg@ARM.com 22711011SAndreas.Sandberg@ARM.com fix = code.nofix() 22811011SAndreas.Sandberg@ARM.com code('(${internal}${{func.c_ident}}($params))') 22911011SAndreas.Sandberg@ARM.com code.fix(fix) 23011011SAndreas.Sandberg@ARM.com 23111011SAndreas.Sandberg@ARM.com return func.return_type 23211011SAndreas.Sandberg@ARM.com