Sequencer.hh revision 9501:378817542866
1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __MEM_RUBY_SYSTEM_SEQUENCER_HH__ 30#define __MEM_RUBY_SYSTEM_SEQUENCER_HH__ 31 32#include <iostream> 33 34#include "base/hashmap.hh" 35#include "mem/protocol/GenericMachineType.hh" 36#include "mem/protocol/RubyRequestType.hh" 37#include "mem/protocol/SequencerRequestType.hh" 38#include "mem/ruby/common/Address.hh" 39#include "mem/ruby/system/CacheMemory.hh" 40#include "mem/ruby/system/RubyPort.hh" 41#include "params/RubySequencer.hh" 42 43class DataBlock; 44 45struct SequencerRequest 46{ 47 PacketPtr pkt; 48 RubyRequestType m_type; 49 Cycles issue_time; 50 51 SequencerRequest(PacketPtr _pkt, RubyRequestType _m_type, 52 Cycles _issue_time) 53 : pkt(_pkt), m_type(_m_type), issue_time(_issue_time) 54 {} 55}; 56 57std::ostream& operator<<(std::ostream& out, const SequencerRequest& obj); 58 59class Sequencer : public RubyPort 60{ 61 public: 62 typedef RubySequencerParams Params; 63 Sequencer(const Params *); 64 ~Sequencer(); 65 66 // Public Methods 67 void wakeup(); // Used only for deadlock detection 68 69 void printProgress(std::ostream& out) const; 70 71 void writeCallback(const Address& address, DataBlock& data); 72 73 void writeCallback(const Address& address, 74 GenericMachineType mach, 75 DataBlock& data); 76 77 void writeCallback(const Address& address, 78 GenericMachineType mach, 79 DataBlock& data, 80 Time initialRequestTime, 81 Time forwardRequestTime, 82 Time firstResponseTime); 83 84 void readCallback(const Address& address, DataBlock& data); 85 86 void readCallback(const Address& address, 87 GenericMachineType mach, 88 DataBlock& data); 89 90 void readCallback(const Address& address, 91 GenericMachineType mach, 92 DataBlock& data, 93 Time initialRequestTime, 94 Time forwardRequestTime, 95 Time firstResponseTime); 96 97 RequestStatus makeRequest(PacketPtr pkt); 98 bool empty() const; 99 int outstandingCount() const { return m_outstanding_count; } 100 bool 101 isDeadlockEventScheduled() const 102 { 103 return deadlockCheckEvent.scheduled(); 104 } 105 106 void 107 descheduleDeadlockEvent() 108 { 109 deschedule(deadlockCheckEvent); 110 } 111 112 void print(std::ostream& out) const; 113 void printStats(std::ostream& out) const; 114 void checkCoherence(const Address& address); 115 116 void markRemoved(); 117 void removeRequest(SequencerRequest* request); 118 void evictionCallback(const Address& address); 119 120 void recordRequestType(SequencerRequestType requestType); 121 122 private: 123 void issueRequest(PacketPtr pkt, RubyRequestType type); 124 125 void hitCallback(SequencerRequest* request, 126 GenericMachineType mach, 127 DataBlock& data, 128 bool success, 129 Time initialRequestTime, 130 Time forwardRequestTime, 131 Time firstResponseTime); 132 133 RequestStatus insertRequest(PacketPtr pkt, RubyRequestType request_type); 134 135 bool handleLlsc(const Address& address, SequencerRequest* request); 136 137 // Private copy constructor and assignment operator 138 Sequencer(const Sequencer& obj); 139 Sequencer& operator=(const Sequencer& obj); 140 141 private: 142 int m_max_outstanding_requests; 143 Cycles m_deadlock_threshold; 144 145 CacheMemory* m_dataCache_ptr; 146 CacheMemory* m_instCache_ptr; 147 148 typedef m5::hash_map<Address, SequencerRequest*> RequestTable; 149 RequestTable m_writeRequestTable; 150 RequestTable m_readRequestTable; 151 // Global outstanding request count, across all request tables 152 int m_outstanding_count; 153 bool m_deadlock_check_scheduled; 154 155 int m_store_waiting_on_load_cycles; 156 int m_store_waiting_on_store_cycles; 157 int m_load_waiting_on_store_cycles; 158 int m_load_waiting_on_load_cycles; 159 160 bool m_usingNetworkTester; 161 162 class SequencerWakeupEvent : public Event 163 { 164 private: 165 Sequencer *m_sequencer_ptr; 166 167 public: 168 SequencerWakeupEvent(Sequencer *_seq) : m_sequencer_ptr(_seq) {} 169 void process() { m_sequencer_ptr->wakeup(); } 170 const char *description() const { return "Sequencer deadlock check"; } 171 }; 172 173 SequencerWakeupEvent deadlockCheckEvent; 174}; 175 176inline std::ostream& 177operator<<(std::ostream& out, const Sequencer& obj) 178{ 179 obj.print(out); 180 out << std::flush; 181 return out; 182} 183 184#endif // __MEM_RUBY_SYSTEM_SEQUENCER_HH__ 185