RubySystem.hh revision 6876 
1
2/*
3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/*
31 * System.hh
32 *
33 * Description: Contains all of the various parts of the system we are
34 * simulating.  Performs allocation, deallocation, and setup of all
35 * the major components of the system
36 *
37 * $Id$
38 *
39 */
40
41#ifndef SYSTEM_H
42#define SYSTEM_H
43
44#include "mem/ruby/system/RubyPort.hh"
45#include "mem/ruby/common/Global.hh"
46#include "mem/gems_common/Vector.hh"
47#include "mem/ruby/eventqueue/RubyEventQueue.hh"
48#include <map>
49#include "sim/sim_object.hh"
50#include "params/RubySystem.hh"
51
52class Profiler;
53class Network;
54class CacheRecorder;
55class Tracer;
56class Sequencer;
57class DMASequencer;
58class MemoryVector;
59class AbstractController;
60class MessageBuffer;
61class CacheMemory;
62class DirectoryMemory;
63class Topology;
64class MemoryControl;
65
66/*
67 * This defines the number of longs (32-bits on 32 bit machines,
68 * 64-bit on 64-bit AMD machines) to use to hold the set...
69 * the default is 4, allowing 128 or 256 different members
70 * of the set.
71 *
72 * This should never need to be changed for correctness reasons,
73 * though increasing it will increase performance for larger
74 * set sizes at the cost of a (much) larger memory footprint
75 *
76 */
77const int NUMBER_WORDS_PER_SET = 4;
78
79
80struct RubyObjConf {
81  string type;
82  string name;
83  vector<string> argv;
84  RubyObjConf(string _type, string _name, vector<string> _argv)
85    : type(_type), name(_name), argv(_argv)
86  {}
87};
88
89class RubySystem : public SimObject {
90public:
91    typedef RubySystemParams Params;
92    RubySystem(const Params *p);
93  // Destructor
94  ~RubySystem();
95
96  // config accessors
97  static int getRandomSeed() { return m_random_seed; }
98  static int getRandomization() { return m_randomization; }
99  static int getTechNm() { return m_tech_nm; }
100  static int getFreqMhz() { return m_freq_mhz; }
101  static int getBlockSizeBytes() { return m_block_size_bytes; }
102  static int getBlockSizeBits() { return m_block_size_bits; }
103  static uint64 getMemorySizeBytes() { return m_memory_size_bytes; }
104  static int getMemorySizeBits() { return m_memory_size_bits; }
105
106  // Public Methods
107  static RubyPort* getPortOnly(const string & name) {
108    assert(m_ports.count(name) == 1); return m_ports[name]; }
109  static RubyPort* getPort(const string & name, void (*hit_callback)(int64_t)) {
110    if (m_ports.count(name) != 1){
111      cerr << "Port " << name << " has " << m_ports.count(name) << " instances" << endl;
112    }
113    assert(m_ports.count(name) == 1);
114    m_ports[name]->registerHitCallback(hit_callback);
115    return m_ports[name];
116  }
117  static Network* getNetwork() { assert(m_network_ptr != NULL); return m_network_ptr; }
118  static Topology* getTopology(const string & name) { assert(m_topologies.count(name) == 1); return m_topologies[name]; }
119  static CacheMemory* getCache(const string & name) { assert(m_caches.count(name) == 1); return m_caches[name]; }
120  static DirectoryMemory* getDirectory(const string & name) { assert(m_directories.count(name) == 1); return m_directories[name]; }
121  static MemoryControl* getMemoryControl(const string & name) { assert(m_memorycontrols.count(name) == 1); return m_memorycontrols[name]; }
122  static Sequencer* getSequencer(const string & name) { assert(m_sequencers.count(name) == 1); return m_sequencers[name]; }
123  static DMASequencer* getDMASequencer(const string & name) { assert(m_dma_sequencers.count(name) == 1); return m_dma_sequencers[name]; }
124  static AbstractController* getController(const string & name) { assert(m_controllers.count(name) == 1); return m_controllers[name]; }
125
126  static RubyEventQueue* getEventQueue() { return g_eventQueue_ptr; }
127
128  static int getNumberOfDirectories() { return m_directories.size(); }
129  static int getNumberOfSequencers() { return m_sequencers.size(); }
130
131  Profiler* getProfiler() {assert(m_profiler_ptr != NULL); return m_profiler_ptr; }
132  static Tracer* getTracer() { assert(m_tracer_ptr != NULL); return m_tracer_ptr; }
133  static MemoryVector* getMemoryVector() { assert(m_mem_vec_ptr != NULL); return m_mem_vec_ptr;}
134
135  void recordCacheContents(CacheRecorder& tr) const;
136  static void printConfig(ostream& out);
137  static void printStats(ostream& out);
138  void clearStats() const;
139
140  uint64 getInstructionCount(int thread) { return 1; }
141  static uint64 getCycleCount(int thread) { return g_eventQueue_ptr->getTime(); }
142
143  void print(ostream& out) const;
144  /*
145#ifdef CHECK_COHERENCE
146  void checkGlobalCoherenceInvariant(const Address& addr);
147#endif
148  */
149
150private:
151  // Constructors
152  RubySystem(const vector <RubyObjConf> & cfg_file);
153
154  // Private copy constructor and assignment operator
155  RubySystem(const RubySystem& obj);
156  RubySystem& operator=(const RubySystem& obj);
157
158  void init();
159
160  static void printSystemConfig(ostream& out);
161
162private:
163  // configuration parameters
164  static int m_random_seed;
165  static bool m_randomization;
166  static int m_tech_nm;
167  static int m_freq_mhz;
168  static int m_block_size_bytes;
169  static int m_block_size_bits;
170  static uint64 m_memory_size_bytes;
171  static int m_memory_size_bits;
172
173  // Data Members (m_ prefix)
174  static Network* m_network_ptr;
175  static map< string, Topology* > m_topologies;
176  static map< string, RubyPort* > m_ports;
177  static map< string, CacheMemory* > m_caches;
178  static map< string, DirectoryMemory* > m_directories;
179  static map< string, Sequencer* > m_sequencers;
180  static map< string, DMASequencer* > m_dma_sequencers;
181  static map< string, AbstractController* > m_controllers;
182  static map< string, MemoryControl* > m_memorycontrols;
183
184  //added by SS
185  //static map< string, Tracer* > m_tracers;
186
187public:
188  static Profiler* m_profiler_ptr;
189  static Tracer* m_tracer_ptr;
190  static MemoryVector* m_mem_vec_ptr;
191};
192
193// Output operator declaration
194ostream& operator<<(ostream& out, const RubySystem& obj);
195
196// ******************* Definitions *******************
197
198// Output operator definition
199inline
200ostream& operator<<(ostream& out, const RubySystem& obj)
201{
202//  obj.print(out);
203  out << flush;
204  return out;
205}
206
207#endif //SYSTEM_H
208
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211