DMASequencer.hh revision 6876 
1
2#ifndef DMASEQUENCER_H
3#define DMASEQUENCER_H
4
5#include <ostream>
6#include "mem/ruby/common/DataBlock.hh"
7#include "mem/ruby/system/RubyPort.hh"
8
9#include "params/DMASequencer.hh"
10
11struct DMARequest {
12  uint64_t start_paddr;
13  int len;
14  bool write;
15  int bytes_completed;
16  int bytes_issued;
17  uint8* data;
18  int64_t id;
19};
20
21class DMASequencer :public RubyPort {
22public:
23    typedef DMASequencerParams Params;
24  DMASequencer(const Params *);
25  void init();
26  /* external interface */
27  int64_t makeRequest(const RubyRequest & request);
28  bool isReady(const RubyRequest & request, bool dont_set = false) { assert(0); return false;};
29  //  void issueRequest(uint64_t paddr, uint8* data, int len, bool rw);
30  bool busy() { return m_is_busy;}
31
32  /* SLICC callback */
33  void dataCallback(const DataBlock & dblk);
34  void ackCallback();
35
36  void printConfig(std::ostream & out);
37
38private:
39  void issueNext();
40
41private:
42  bool m_is_busy;
43  uint64_t m_data_block_mask;
44  DMARequest active_request;
45  int num_active_requests;
46};
47
48#endif // DMACONTROLLER_H
49