DMASequencer.cc revision 8232
1/* 2 * Copyright (c) 2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include "debug/RubyDma.hh" 30#include "mem/protocol/SequencerMsg.hh" 31#include "mem/protocol/SequencerRequestType.hh" 32#include "mem/ruby/buffers/MessageBuffer.hh" 33#include "mem/ruby/slicc_interface/AbstractController.hh" 34#include "mem/ruby/system/DMASequencer.hh" 35#include "mem/ruby/system/System.hh" 36 37DMASequencer::DMASequencer(const Params *p) 38 : RubyPort(p) 39{ 40} 41 42void 43DMASequencer::init() 44{ 45 RubyPort::init(); 46 m_is_busy = false; 47 m_data_block_mask = ~ (~0 << RubySystem::getBlockSizeBits()); 48} 49 50RequestStatus 51DMASequencer::makeRequest(const RubyRequest &request) 52{ 53 if (m_is_busy) { 54 return RequestStatus_BufferFull; 55 } 56 57 uint64_t paddr = request.m_PhysicalAddress.getAddress(); 58 uint8_t* data = request.data; 59 int len = request.m_Size; 60 bool write = false; 61 switch(request.m_Type) { 62 case RubyRequestType_LD: 63 write = false; 64 break; 65 case RubyRequestType_ST: 66 write = true; 67 break; 68 default: 69 panic("DMASequencer::makeRequest does not support RubyRequestType"); 70 return RequestStatus_NULL; 71 } 72 73 assert(!m_is_busy); // only support one outstanding DMA request 74 m_is_busy = true; 75 76 active_request.start_paddr = paddr; 77 active_request.write = write; 78 active_request.data = data; 79 active_request.len = len; 80 active_request.bytes_completed = 0; 81 active_request.bytes_issued = 0; 82 active_request.pkt = request.pkt; 83 84 SequencerMsg *msg = new SequencerMsg; 85 msg->getPhysicalAddress() = Address(paddr); 86 msg->getLineAddress() = line_address(msg->getPhysicalAddress()); 87 msg->getType() = write ? SequencerRequestType_ST : SequencerRequestType_LD; 88 int offset = paddr & m_data_block_mask; 89 90 msg->getLen() = (offset + len) <= RubySystem::getBlockSizeBytes() ? 91 len : RubySystem::getBlockSizeBytes() - offset; 92 93 if (write && (data != NULL)) { 94 if (active_request.data != NULL) { 95 msg->getDataBlk().setData(data, offset, msg->getLen()); 96 } 97 } 98 99 assert(m_mandatory_q_ptr != NULL); 100 m_mandatory_q_ptr->enqueue(msg); 101 active_request.bytes_issued += msg->getLen(); 102 103 return RequestStatus_Issued; 104} 105 106void 107DMASequencer::issueNext() 108{ 109 assert(m_is_busy == true); 110 active_request.bytes_completed = active_request.bytes_issued; 111 if (active_request.len == active_request.bytes_completed) { 112 // 113 // Must unset the busy flag before calling back the dma port because 114 // the callback may cause a previously nacked request to be reissued 115 // 116 DPRINTF(RubyDma, "DMA request completed\n"); 117 m_is_busy = false; 118 ruby_hit_callback(active_request.pkt); 119 return; 120 } 121 122 SequencerMsg *msg = new SequencerMsg; 123 msg->getPhysicalAddress() = Address(active_request.start_paddr + 124 active_request.bytes_completed); 125 126 assert((msg->getPhysicalAddress().getAddress() & m_data_block_mask) == 0); 127 msg->getLineAddress() = line_address(msg->getPhysicalAddress()); 128 129 msg->getType() = (active_request.write ? SequencerRequestType_ST : 130 SequencerRequestType_LD); 131 132 msg->getLen() = 133 (active_request.len - 134 active_request.bytes_completed < RubySystem::getBlockSizeBytes() ? 135 active_request.len - active_request.bytes_completed : 136 RubySystem::getBlockSizeBytes()); 137 138 if (active_request.write) { 139 msg->getDataBlk(). 140 setData(&active_request.data[active_request.bytes_completed], 141 0, msg->getLen()); 142 msg->getType() = SequencerRequestType_ST; 143 } else { 144 msg->getType() = SequencerRequestType_LD; 145 } 146 147 assert(m_mandatory_q_ptr != NULL); 148 m_mandatory_q_ptr->enqueue(msg); 149 active_request.bytes_issued += msg->getLen(); 150 DPRINTF(RubyDma, 151 "DMA request bytes issued %d, bytes completed %d, total len %d\n", 152 active_request.bytes_issued, active_request.bytes_completed, 153 active_request.len); 154} 155 156void 157DMASequencer::dataCallback(const DataBlock & dblk) 158{ 159 assert(m_is_busy == true); 160 int len = active_request.bytes_issued - active_request.bytes_completed; 161 int offset = 0; 162 if (active_request.bytes_completed == 0) 163 offset = active_request.start_paddr & m_data_block_mask; 164 assert(active_request.write == false); 165 if (active_request.data != NULL) { 166 memcpy(&active_request.data[active_request.bytes_completed], 167 dblk.getData(offset, len), len); 168 } 169 issueNext(); 170} 171 172void 173DMASequencer::ackCallback() 174{ 175 issueNext(); 176} 177 178void 179DMASequencer::printConfig(std::ostream & out) 180{ 181} 182 183DMASequencer * 184DMASequencerParams::create() 185{ 186 return new DMASequencer(this); 187} 188