DMASequencer.cc revision 6888
1 2#include "mem/ruby/system/DMASequencer.hh" 3#include "mem/ruby/buffers/MessageBuffer.hh" 4#include "mem/ruby/slicc_interface/AbstractController.hh" 5 6/* SLICC generated types */ 7#include "mem/protocol/SequencerMsg.hh" 8#include "mem/protocol/SequencerRequestType.hh" 9#include "mem/ruby/system/System.hh" 10 11// 12// Fix me: This code needs comments! 13// 14 15DMASequencer::DMASequencer(const Params *p) 16 : RubyPort(p) 17{ 18} 19 20void DMASequencer::init() 21{ 22 RubyPort::init(); 23 m_is_busy = false; 24 m_data_block_mask = ~ (~0 << RubySystem::getBlockSizeBits()); 25} 26 27int64_t DMASequencer::makeRequest(const RubyRequest & request) 28{ 29 uint64_t paddr = request.paddr; 30 uint8_t* data = request.data; 31 int len = request.len; 32 bool write = false; 33 switch(request.type) { 34 case RubyRequestType_LD: 35 write = false; 36 break; 37 case RubyRequestType_ST: 38 write = true; 39 break; 40 case RubyRequestType_NULL: 41 case RubyRequestType_IFETCH: 42 case RubyRequestType_Locked_Read: 43 case RubyRequestType_Locked_Write: 44 case RubyRequestType_RMW_Read: 45 case RubyRequestType_RMW_Write: 46 case RubyRequestType_NUM: 47 assert(0); 48 } 49 50 assert(!m_is_busy); // only support one outstanding DMA request 51 m_is_busy = true; 52 53 active_request.start_paddr = paddr; 54 active_request.write = write; 55 active_request.data = data; 56 active_request.len = len; 57 active_request.bytes_completed = 0; 58 active_request.bytes_issued = 0; 59 active_request.id = makeUniqueRequestID(); 60 61 SequencerMsg msg; 62 msg.getPhysicalAddress() = Address(paddr); 63 msg.getLineAddress() = line_address(msg.getPhysicalAddress()); 64 msg.getType() = write ? SequencerRequestType_ST : SequencerRequestType_LD; 65 int offset = paddr & m_data_block_mask; 66 67 msg.getLen() = (offset + len) <= RubySystem::getBlockSizeBytes() ? 68 len : 69 RubySystem::getBlockSizeBytes() - offset; 70 71 if (write) { 72 msg.getDataBlk().setData(data, offset, msg.getLen()); 73 } 74 75 assert(m_mandatory_q_ptr != NULL); 76 m_mandatory_q_ptr->enqueue(msg); 77 active_request.bytes_issued += msg.getLen(); 78 79 return active_request.id; 80} 81 82void DMASequencer::issueNext() 83{ 84 assert(m_is_busy == true); 85 active_request.bytes_completed = active_request.bytes_issued; 86 if (active_request.len == active_request.bytes_completed) { 87 m_hit_callback(active_request.id); 88 m_is_busy = false; 89 return; 90 } 91 92 SequencerMsg msg; 93 msg.getPhysicalAddress() = Address(active_request.start_paddr + 94 active_request.bytes_completed); 95 96 assert((msg.getPhysicalAddress().getAddress() & m_data_block_mask) == 0); 97 msg.getLineAddress() = line_address(msg.getPhysicalAddress()); 98 99 msg.getType() = (active_request.write ? SequencerRequestType_ST : 100 SequencerRequestType_LD); 101 102 msg.getLen() = (active_request.len - 103 active_request.bytes_completed < RubySystem::getBlockSizeBytes() ? 104 active_request.len - active_request.bytes_completed : 105 RubySystem::getBlockSizeBytes()); 106 107 if (active_request.write) { 108 msg.getDataBlk().setData(&active_request.data[active_request.bytes_completed], 109 0, msg.getLen()); 110 msg.getType() = SequencerRequestType_ST; 111 } else { 112 msg.getType() = SequencerRequestType_LD; 113 } 114 115 assert(m_mandatory_q_ptr != NULL); 116 m_mandatory_q_ptr->enqueue(msg); 117 active_request.bytes_issued += msg.getLen(); 118} 119 120void DMASequencer::dataCallback(const DataBlock & dblk) 121{ 122 assert(m_is_busy == true); 123 int len = active_request.bytes_issued - active_request.bytes_completed; 124 int offset = 0; 125 if (active_request.bytes_completed == 0) 126 offset = active_request.start_paddr & m_data_block_mask; 127 assert( active_request.write == false ); 128 memcpy(&active_request.data[active_request.bytes_completed], 129 dblk.getData(offset, len), len); 130 issueNext(); 131} 132 133void DMASequencer::ackCallback() 134{ 135 issueNext(); 136} 137 138void DMASequencer::printConfig(ostream & out) 139{ 140 141} 142 143 144DMASequencer * 145DMASequencerParams::create() 146{ 147 return new DMASequencer(this); 148} 149