BankedArray.hh revision 9184
14167Sbinkertn@umich.edu/* 23005Sstever@eecs.umich.edu * Copyright (c) 2012 Advanced Micro Devices, Inc. 33005Sstever@eecs.umich.edu * All rights reserved. 43005Sstever@eecs.umich.edu * 53005Sstever@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 63005Sstever@eecs.umich.edu * modification, are permitted provided that the following conditions are 73005Sstever@eecs.umich.edu * met: redistributions of source code must retain the above copyright 83005Sstever@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 93005Sstever@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 103005Sstever@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 113005Sstever@eecs.umich.edu * documentation and/or other materials provided with the distribution; 123005Sstever@eecs.umich.edu * neither the name of the copyright holders nor the names of its 133005Sstever@eecs.umich.edu * contributors may be used to endorse or promote products derived from 143005Sstever@eecs.umich.edu * this software without specific prior written permission. 153005Sstever@eecs.umich.edu * 163005Sstever@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 173005Sstever@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 183005Sstever@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 193005Sstever@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 203005Sstever@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 213005Sstever@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 223005Sstever@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 233005Sstever@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 243005Sstever@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 253005Sstever@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 263005Sstever@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273005Sstever@eecs.umich.edu * 283005Sstever@eecs.umich.edu * Author: Brad Beckmann 293005Sstever@eecs.umich.edu * 303005Sstever@eecs.umich.edu */ 313005Sstever@eecs.umich.edu 323005Sstever@eecs.umich.edu#ifndef __MEM_RUBY_SYSTEM_BANKEDARRAY_HH__ 333005Sstever@eecs.umich.edu#define __MEM_RUBY_SYSTEM_BANKEDARRAY_HH__ 343170Sstever@eecs.umich.edu 353005Sstever@eecs.umich.edu#include <vector> 363005Sstever@eecs.umich.edu 373005Sstever@eecs.umich.edu#include "mem/ruby/common/TypeDefines.hh" 383005Sstever@eecs.umich.edu#include "sim/eventq.hh" 394167Sbinkertn@umich.edu 404167Sbinkertn@umich.edu 41 42class BankedArray : public EventManager 43{ 44private: 45 unsigned int banks; 46 Cycles accessLatency; 47 unsigned int bankBits; 48 unsigned int startIndexBit; 49 50 //std::vector<bool> busyBanks; 51 52 class TickEvent : public Event 53 { 54 public: 55 TickEvent() : Event() {} 56 void process() {} 57 Index idx; 58 Tick startAccess; 59 }; 60 friend class TickEvent; 61 62 // If the tick event is scheduled then the bank is busy 63 // otherwise, schedule the event and wait for it to complete 64 std::vector<TickEvent> busyBanks; 65 66 unsigned int mapIndexToBank(Index idx); 67 68public: 69 BankedArray(unsigned int banks, Cycles accessLatency, unsigned int startIndexBit); 70 71 // Note: We try the access based on the cache index, not the address 72 // This is so we don't get aliasing on blocks being replaced 73 bool tryAccess(Index idx); 74 75}; 76 77#endif 78