BankedArray.hh revision 9105
14486Sbinkertn@umich.edu
24486Sbinkertn@umich.edu#ifndef __MEM_RUBY_SYSTEM_BANKEDARRAY_HH__
34486Sbinkertn@umich.edu#define __MEM_RUBY_SYSTEM_BANKEDARRAY_HH__
44486Sbinkertn@umich.edu
54486Sbinkertn@umich.edu#include <vector>
64486Sbinkertn@umich.edu
74486Sbinkertn@umich.edu#include "mem/ruby/common/TypeDefines.hh"
84486Sbinkertn@umich.edu#include "sim/eventq.hh"
94486Sbinkertn@umich.edu
104486Sbinkertn@umich.edu
114486Sbinkertn@umich.edu
124486Sbinkertn@umich.educlass BankedArray : public EventManager
134486Sbinkertn@umich.edu{
144486Sbinkertn@umich.eduprivate:
154486Sbinkertn@umich.edu    unsigned int banks;
164486Sbinkertn@umich.edu    unsigned int accessLatency;
174486Sbinkertn@umich.edu    unsigned int bankBits;
184486Sbinkertn@umich.edu    unsigned int startIndexBit;
194486Sbinkertn@umich.edu
204486Sbinkertn@umich.edu    //std::vector<bool> busyBanks;
214486Sbinkertn@umich.edu
224486Sbinkertn@umich.edu    class TickEvent : public Event
234486Sbinkertn@umich.edu    {
244486Sbinkertn@umich.edu    public:
254486Sbinkertn@umich.edu        TickEvent() : Event() {}
264486Sbinkertn@umich.edu        void process() {}
274486Sbinkertn@umich.edu        Index idx;
284486Sbinkertn@umich.edu        Tick startAccess;
293102SN/A    };
303102SN/A    friend class TickEvent;
3113665Sandreas.sandberg@arm.com
3213665Sandreas.sandberg@arm.com    // If the tick event is scheduled then the bank is busy
332292SN/A    // otherwise, schedule the event and wait for it to complete
342292SN/A    std::vector<TickEvent> busyBanks;
352292SN/A
369338SAndreas.Sandberg@arm.com    unsigned int mapIndexToBank(Index idx);
372292SN/A
383223SN/Apublic:
393223SN/A    BankedArray(unsigned int banks, unsigned int accessLatency, unsigned int startIndexBit);
403223SN/A
417760SGiacomo.Gabrielli@arm.com    // Note: We try the access based on the cache index, not the address
42    // This is so we don't get aliasing on blocks being replaced
43    bool tryAccess(Index idx);
44
45};
46
47#endif
48