RubyRequest.cc revision 9572 
1#include <iostream>
2
3#include "mem/ruby/slicc_interface/RubyRequest.hh"
4
5using namespace std;
6
7void
8RubyRequest::print(ostream& out) const
9{
10  out << "[RubyRequest: ";
11  out << "LineAddress = " << m_LineAddress << " ";
12  out << "PhysicalAddress = " << m_PhysicalAddress << " ";
13  out << "Type = " << m_Type << " ";
14  out << "ProgramCounter = " << m_ProgramCounter << " ";
15  out << "AccessMode = " << m_AccessMode << " ";
16  out << "Size = " << m_Size << " ";
17  out << "Prefetch = " << m_Prefetch << " ";
18//  out << "Time = " << getTime() << " ";
19  out << "]";
20}
21
22bool
23RubyRequest::functionalRead(Packet *pkt)
24{
25    // This needs a little explanation. Initially I thought that this
26    // message should be read. But the way the memtester works for now,
27    // we should not be reading this message as memtester updates the
28    // functional memory only after a write has actually taken place.
29    return false;
30}
31
32bool
33RubyRequest::functionalWrite(Packet *pkt)
34{
35    // This needs a little explanation. I am not sure if this message
36    // should be written. Essentially the question is how are writes
37    // ordered. I am assuming that if a functional write is issued after
38    // a timing write to the same address, then the functional write
39    // has to overwrite the data for the timing request, even if the
40    // timing request has still not been ordered globally.
41
42    Addr wBase = pkt->getAddr();
43    Addr wTail = wBase + pkt->getSize();
44    Addr mBase = m_PhysicalAddress.getAddress();
45    Addr mTail = mBase + m_Size;
46
47    uint8_t * pktData = pkt->getPtr<uint8_t>(true);
48
49    Addr cBase = std::max(wBase, mBase);
50    Addr cTail = std::min(wTail, mTail);
51
52    for (Addr i = cBase; i < cTail; ++i) {
53        data[i - mBase] = pktData[i - wBase];
54    }
55
56    return cBase < cTail;
57}
58