AbstractCacheEntry.hh revision 7839 
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 * Common base class for a machine node.
31 */
32
33#ifndef __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCACHEENTRY_HH__
34#define __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCACHEENTRY_HH__
35
36#include <iostream>
37
38#include "mem/protocol/AccessPermission.hh"
39#include "mem/ruby/common/Address.hh"
40#include "mem/ruby/common/Global.hh"
41#include "mem/ruby/slicc_interface/AbstractEntry.hh"
42
43class DataBlock;
44
45class AbstractCacheEntry : public AbstractEntry
46{
47  public:
48    AbstractCacheEntry();
49    virtual ~AbstractCacheEntry() = 0;
50
51    // Get/Set permission of cache entry
52    AccessPermission getPermission() const;
53    void changePermission(AccessPermission new_perm);
54
55    Address m_Address; // Address of this block, required by CacheMemory
56    Time m_LastRef; // Last time this block was referenced, required
57                    // by CacheMemory
58    AccessPermission m_Permission; // Access permission for this
59                                   // block, required by CacheMemory
60    int m_locked; // Holds info whether the address is locked,
61                  // required for implementing LL/SC
62};
63
64inline std::ostream&
65operator<<(std::ostream& out, const AbstractCacheEntry& obj)
66{
67    obj.print(out);
68    out << std::flush;
69    return out;
70}
71
72#endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCACHEENTRY_HH__
73