Profiler.hh revision 7048:2ab58c54de63
1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 This file has been modified by Kevin Moore and Dan Nussbaum of the 31 Scalable Systems Research Group at Sun Microsystems Laboratories 32 (http://research.sun.com/scalable/) to support the Adaptive 33 Transactional Memory Test Platform (ATMTP). 34 35 Please send email to atmtp-interest@sun.com with feedback, questions, or 36 to request future announcements about ATMTP. 37 38 ---------------------------------------------------------------------- 39 40 File modification date: 2008-02-23 41 42 ---------------------------------------------------------------------- 43*/ 44 45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__ 46#define __MEM_RUBY_PROFILER_PROFILER_HH__ 47 48#include "mem/protocol/AccessModeType.hh" 49#include "mem/protocol/AccessType.hh" 50#include "mem/protocol/CacheRequestType.hh" 51#include "mem/protocol/GenericMachineType.hh" 52#include "mem/protocol/GenericRequestType.hh" 53#include "mem/protocol/PrefetchBit.hh" 54#include "mem/ruby/common/Address.hh" 55#include "mem/ruby/common/Consumer.hh" 56#include "mem/ruby/common/Global.hh" 57#include "mem/ruby/common/Histogram.hh" 58#include "mem/ruby/common/Set.hh" 59#include "mem/ruby/libruby.hh" 60#include "mem/ruby/system/MachineID.hh" 61#include "mem/ruby/system/MemoryControl.hh" 62#include "mem/ruby/system/NodeID.hh" 63#include "params/RubyProfiler.hh" 64#include "sim/sim_object.hh" 65 66class CacheMsg; 67class AddressProfiler; 68 69template <class KEY_TYPE, class VALUE_TYPE> class Map; 70 71class Profiler : public SimObject, public Consumer 72{ 73 public: 74 typedef RubyProfilerParams Params; 75 Profiler(const Params *); 76 ~Profiler(); 77 78 void wakeup(); 79 80 void setPeriodicStatsFile(const string& filename); 81 void setPeriodicStatsInterval(integer_t period); 82 83 void printStats(ostream& out, bool short_stats=false); 84 void printShortStats(ostream& out) { printStats(out, true); } 85 void printTraceStats(ostream& out) const; 86 void clearStats(); 87 void printConfig(ostream& out) const; 88 void printResourceUsage(ostream& out) const; 89 90 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; } 91 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; } 92 93 void addAddressTraceSample(const CacheMsg& msg, NodeID id); 94 95 void profileRequest(const string& requestStr); 96 void profileSharing(const Address& addr, AccessType type, 97 NodeID requestor, const Set& sharers, 98 const Set& owner); 99 100 void profileMulticastRetry(const Address& addr, int count); 101 102 void profileFilterAction(int action); 103 104 void profileConflictingRequests(const Address& addr); 105 106 void 107 profileOutstandingRequest(int outstanding) 108 { 109 m_outstanding_requests.add(outstanding); 110 } 111 112 void 113 profileOutstandingPersistentRequest(int outstanding) 114 { 115 m_outstanding_persistent_requests.add(outstanding); 116 } 117 118 void 119 profileAverageLatencyEstimate(int latency) 120 { 121 m_average_latency_estimate.add(latency); 122 } 123 124 void recordPrediction(bool wasGood, bool wasPredicted); 125 126 void startTransaction(int cpu); 127 void endTransaction(int cpu); 128 void profilePFWait(Time waitTime); 129 130 void controllerBusy(MachineID machID); 131 void bankBusy(); 132 void missLatency(Time t, RubyRequestType type); 133 void swPrefetchLatency(Time t, CacheRequestType type, 134 GenericMachineType respondingMach); 135 void sequencerRequests(int num) { m_sequencer_requests.add(num); } 136 137 void profileTransition(const string& component, NodeID version, 138 Address addr, const string& state, 139 const string& event, const string& next_state, 140 const string& note); 141 void profileMsgDelay(int virtualNetwork, int delayCycles); 142 143 void print(ostream& out) const; 144 145 void rubyWatch(int proc); 146 bool watchAddress(Address addr); 147 148 // return Ruby's start time 149 Time 150 getRubyStartTime() 151 { 152 return m_ruby_start; 153 } 154 155 // added by SS 156 bool getHotLines() { return m_hot_lines; } 157 bool getAllInstructions() { return m_all_instructions; } 158 159 private: 160 // Private copy constructor and assignment operator 161 Profiler(const Profiler& obj); 162 Profiler& operator=(const Profiler& obj); 163 164 AddressProfiler* m_address_profiler_ptr; 165 AddressProfiler* m_inst_profiler_ptr; 166 167 Vector<int64> m_instructions_executed_at_start; 168 Vector<int64> m_cycles_executed_at_start; 169 170 ostream* m_periodic_output_file_ptr; 171 integer_t m_stats_period; 172 173 Time m_ruby_start; 174 time_t m_real_time_start_time; 175 176 Vector <Vector<integer_t> > m_busyControllerCount; 177 integer_t m_busyBankCount; 178 Histogram m_multicast_retry_histogram; 179 180 Histogram m_filter_action_histogram; 181 Histogram m_tbeProfile; 182 183 Histogram m_sequencer_requests; 184 Histogram m_read_sharing_histogram; 185 Histogram m_write_sharing_histogram; 186 Histogram m_all_sharing_histogram; 187 int64 m_cache_to_cache; 188 int64 m_memory_to_cache; 189 190 Histogram m_prefetchWaitHistogram; 191 192 Vector<Histogram> m_missLatencyHistograms; 193 Vector<Histogram> m_machLatencyHistograms; 194 Histogram m_allMissLatencyHistogram; 195 196 Histogram m_allSWPrefetchLatencyHistogram; 197 Histogram m_SWPrefetchL2MissLatencyHistogram; 198 Vector<Histogram> m_SWPrefetchLatencyHistograms; 199 Vector<Histogram> m_SWPrefetchMachLatencyHistograms; 200 201 Histogram m_delayedCyclesHistogram; 202 Histogram m_delayedCyclesNonPFHistogram; 203 Vector<Histogram> m_delayedCyclesVCHistograms; 204 205 Histogram m_outstanding_requests; 206 Histogram m_outstanding_persistent_requests; 207 208 Histogram m_average_latency_estimate; 209 210 Map<Address, int>* m_watch_address_list_ptr; 211 // counts all initiated cache request including PUTs 212 int m_requests; 213 Map <string, int>* m_requestProfileMap_ptr; 214 215 //added by SS 216 bool m_hot_lines; 217 bool m_all_instructions; 218 219 int m_num_of_sequencers; 220}; 221 222inline ostream& 223operator<<(ostream& out, const Profiler& obj) 224{ 225 obj.print(out); 226 out << flush; 227 return out; 228} 229 230#endif // __MEM_RUBY_PROFILER_PROFILER_HH__ 231 232 233