Profiler.hh revision 7010:c769c45253c9 
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30   This file has been modified by Kevin Moore and Dan Nussbaum of the
31   Scalable Systems Research Group at Sun Microsystems Laboratories
32   (http://research.sun.com/scalable/) to support the Adaptive
33   Transactional Memory Test Platform (ATMTP).
34
35   Please send email to atmtp-interest@sun.com with feedback, questions, or
36   to request future announcements about ATMTP.
37
38   ----------------------------------------------------------------------
39
40   File modification date: 2008-02-23
41
42   ----------------------------------------------------------------------
43*/
44
45/*
46 * Profiler.hh
47 *
48 * Description:
49 *
50 * $Id$
51 *
52 */
53
54#ifndef PROFILER_H
55#define PROFILER_H
56
57#include "mem/ruby/libruby.hh"
58
59#include "mem/ruby/common/Global.hh"
60#include "mem/protocol/GenericMachineType.hh"
61#include "mem/ruby/common/Histogram.hh"
62#include "mem/ruby/common/Consumer.hh"
63#include "mem/protocol/AccessModeType.hh"
64#include "mem/protocol/AccessType.hh"
65#include "mem/ruby/system/NodeID.hh"
66#include "mem/ruby/system/MachineID.hh"
67#include "mem/protocol/PrefetchBit.hh"
68#include "mem/ruby/common/Address.hh"
69#include "mem/ruby/common/Set.hh"
70#include "mem/protocol/CacheRequestType.hh"
71#include "mem/protocol/GenericRequestType.hh"
72#include "mem/ruby/system/MemoryControl.hh"
73
74#include "params/RubyProfiler.hh"
75#include "sim/sim_object.hh"
76
77class CacheMsg;
78class AddressProfiler;
79
80template <class KEY_TYPE, class VALUE_TYPE> class Map;
81
82class Profiler : public SimObject, public Consumer {
83public:
84  // Constructors
85    typedef RubyProfilerParams Params;
86  Profiler(const Params *);
87
88  // Destructor
89  ~Profiler();
90
91  // Public Methods
92  void wakeup();
93
94  void setPeriodicStatsFile(const string& filename);
95  void setPeriodicStatsInterval(integer_t period);
96
97  void printStats(ostream& out, bool short_stats=false);
98  void printShortStats(ostream& out) { printStats(out, true); }
99  void printTraceStats(ostream& out) const;
100  void clearStats();
101  void printConfig(ostream& out) const;
102  void printResourceUsage(ostream& out) const;
103
104  AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
105  AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
106
107  void addAddressTraceSample(const CacheMsg& msg, NodeID id);
108
109  void profileRequest(const string& requestStr);
110  void profileSharing(const Address& addr, AccessType type, NodeID requestor, const Set& sharers, const Set& owner);
111
112  void profileMulticastRetry(const Address& addr, int count);
113
114  void profileFilterAction(int action);
115
116  void profileConflictingRequests(const Address& addr);
117  void profileOutstandingRequest(int outstanding) { m_outstanding_requests.add(outstanding); }
118  void profileOutstandingPersistentRequest(int outstanding) { m_outstanding_persistent_requests.add(outstanding); }
119  void profileAverageLatencyEstimate(int latency) { m_average_latency_estimate.add(latency); }
120
121  void recordPrediction(bool wasGood, bool wasPredicted);
122
123  void startTransaction(int cpu);
124  void endTransaction(int cpu);
125  void profilePFWait(Time waitTime);
126
127  void controllerBusy(MachineID machID);
128  void bankBusy();
129  void missLatency(Time t, RubyRequestType type);
130  void swPrefetchLatency(Time t, CacheRequestType type, GenericMachineType respondingMach);
131  void sequencerRequests(int num) { m_sequencer_requests.add(num); }
132
133  void profileTransition(const string& component, NodeID version, Address addr,
134                         const string& state, const string& event,
135                         const string& next_state, const string& note);
136  void profileMsgDelay(int virtualNetwork, int delayCycles);
137
138  void print(ostream& out) const;
139
140  void rubyWatch(int proc);
141  bool watchAddress(Address addr);
142
143  // return Ruby's start time
144  Time getRubyStartTime(){
145    return m_ruby_start;
146  }
147
148  //added by SS
149  bool getHotLines() { return m_hot_lines; }
150  bool getAllInstructions() { return m_all_instructions; }
151
152private:
153
154  // Private copy constructor and assignment operator
155  Profiler(const Profiler& obj);
156  Profiler& operator=(const Profiler& obj);
157
158  // Data Members (m_ prefix)
159  AddressProfiler* m_address_profiler_ptr;
160  AddressProfiler* m_inst_profiler_ptr;
161
162  Vector<int64> m_instructions_executed_at_start;
163  Vector<int64> m_cycles_executed_at_start;
164
165  ostream* m_periodic_output_file_ptr;
166  integer_t m_stats_period;
167
168  Time m_ruby_start;
169  time_t m_real_time_start_time;
170
171  Vector < Vector < integer_t > > m_busyControllerCount;
172  integer_t m_busyBankCount;
173  Histogram m_multicast_retry_histogram;
174
175  Histogram m_filter_action_histogram;
176  Histogram m_tbeProfile;
177
178  Histogram m_sequencer_requests;
179  Histogram m_read_sharing_histogram;
180  Histogram m_write_sharing_histogram;
181  Histogram m_all_sharing_histogram;
182  int64 m_cache_to_cache;
183  int64 m_memory_to_cache;
184
185  Histogram m_prefetchWaitHistogram;
186
187  Vector<Histogram> m_missLatencyHistograms;
188  Vector<Histogram> m_machLatencyHistograms;
189  Histogram m_allMissLatencyHistogram;
190
191  Histogram  m_allSWPrefetchLatencyHistogram;
192  Histogram  m_SWPrefetchL2MissLatencyHistogram;
193  Vector<Histogram> m_SWPrefetchLatencyHistograms;
194  Vector<Histogram> m_SWPrefetchMachLatencyHistograms;
195
196  Histogram m_delayedCyclesHistogram;
197  Histogram m_delayedCyclesNonPFHistogram;
198  Vector<Histogram> m_delayedCyclesVCHistograms;
199
200  Histogram m_outstanding_requests;
201  Histogram m_outstanding_persistent_requests;
202
203  Histogram m_average_latency_estimate;
204
205  Map<Address, int>* m_watch_address_list_ptr;
206  // counts all initiated cache request including PUTs
207  int m_requests;
208  Map <string, int>* m_requestProfileMap_ptr;
209
210  //added by SS
211  bool m_hot_lines;
212  bool m_all_instructions;
213
214  int m_num_of_sequencers;
215};
216
217// Output operator declaration
218ostream& operator<<(ostream& out, const Profiler& obj);
219
220// ******************* Definitions *******************
221
222// Output operator definition
223extern inline
224ostream& operator<<(ostream& out, const Profiler& obj)
225{
226  obj.print(out);
227  out << flush;
228  return out;
229}
230
231#endif //PROFILER_H
232
233
234