Profiler.hh revision 10920:58fbfddff18d
1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 This file has been modified by Kevin Moore and Dan Nussbaum of the 31 Scalable Systems Research Group at Sun Microsystems Laboratories 32 (http://research.sun.com/scalable/) to support the Adaptive 33 Transactional Memory Test Platform (ATMTP). 34 35 Please send email to atmtp-interest@sun.com with feedback, questions, or 36 to request future announcements about ATMTP. 37 38 ---------------------------------------------------------------------- 39 40 File modification date: 2008-02-23 41 42 ---------------------------------------------------------------------- 43*/ 44 45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__ 46#define __MEM_RUBY_PROFILER_PROFILER_HH__ 47 48#include <map> 49#include <string> 50#include <vector> 51 52#include "base/callback.hh" 53#include "base/hashmap.hh" 54#include "base/statistics.hh" 55#include "mem/protocol/AccessType.hh" 56#include "mem/protocol/PrefetchBit.hh" 57#include "mem/protocol/RubyAccessMode.hh" 58#include "mem/protocol/RubyRequestType.hh" 59#include "mem/ruby/common/MachineID.hh" 60#include "params/RubySystem.hh" 61 62class RubyRequest; 63class AddressProfiler; 64 65class Profiler 66{ 67 public: 68 Profiler(const RubySystemParams *params, RubySystem *rs); 69 ~Profiler(); 70 71 RubySystem *m_ruby_system; 72 73 void wakeup(); 74 void regStats(const std::string &name); 75 void collateStats(); 76 77 AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; } 78 AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; } 79 80 void addAddressTraceSample(const RubyRequest& msg, NodeID id); 81 82 // added by SS 83 bool getHotLines() { return m_hot_lines; } 84 bool getAllInstructions() { return m_all_instructions; } 85 86 private: 87 // Private copy constructor and assignment operator 88 Profiler(const Profiler& obj); 89 Profiler& operator=(const Profiler& obj); 90 91 AddressProfiler* m_address_profiler_ptr; 92 AddressProfiler* m_inst_profiler_ptr; 93 94 Stats::Histogram delayHistogram; 95 std::vector<Stats::Histogram *> delayVCHistogram; 96 97 //! Histogram for number of outstanding requests per cycle. 98 Stats::Histogram m_outstandReqHist; 99 100 //! Histogram for holding latency profile of all requests. 101 Stats::Histogram m_latencyHist; 102 std::vector<Stats::Histogram *> m_typeLatencyHist; 103 104 //! Histogram for holding latency profile of all requests that 105 //! hit in the controller connected to this sequencer. 106 Stats::Histogram m_hitLatencyHist; 107 std::vector<Stats::Histogram *> m_hitTypeLatencyHist; 108 109 //! Histograms for profiling the latencies for requests that 110 //! did not required external messages. 111 std::vector<Stats::Histogram *> m_hitMachLatencyHist; 112 std::vector< std::vector<Stats::Histogram *> > m_hitTypeMachLatencyHist; 113 114 //! Histogram for holding latency profile of all requests that 115 //! miss in the controller connected to this sequencer. 116 Stats::Histogram m_missLatencyHist; 117 std::vector<Stats::Histogram *> m_missTypeLatencyHist; 118 119 //! Histograms for profiling the latencies for requests that 120 //! required external messages. 121 std::vector<Stats::Histogram *> m_missMachLatencyHist; 122 std::vector< std::vector<Stats::Histogram *> > m_missTypeMachLatencyHist; 123 124 //! Histograms for recording the breakdown of miss latency 125 std::vector<Stats::Histogram *> m_IssueToInitialDelayHist; 126 std::vector<Stats::Histogram *> m_InitialToForwardDelayHist; 127 std::vector<Stats::Histogram *> m_ForwardToFirstResponseDelayHist; 128 std::vector<Stats::Histogram *> m_FirstResponseToCompletionDelayHist; 129 Stats::Scalar m_IncompleteTimes[MachineType_NUM]; 130 131 //added by SS 132 bool m_hot_lines; 133 bool m_all_instructions; 134}; 135 136#endif // __MEM_RUBY_PROFILER_PROFILER_HH__ 137