Profiler.hh revision 10919:80069a602c83 
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30   This file has been modified by Kevin Moore and Dan Nussbaum of the
31   Scalable Systems Research Group at Sun Microsystems Laboratories
32   (http://research.sun.com/scalable/) to support the Adaptive
33   Transactional Memory Test Platform (ATMTP).
34
35   Please send email to atmtp-interest@sun.com with feedback, questions, or
36   to request future announcements about ATMTP.
37
38   ----------------------------------------------------------------------
39
40   File modification date: 2008-02-23
41
42   ----------------------------------------------------------------------
43*/
44
45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46#define __MEM_RUBY_PROFILER_PROFILER_HH__
47
48#include <map>
49#include <string>
50#include <vector>
51
52#include "base/callback.hh"
53#include "base/hashmap.hh"
54#include "base/statistics.hh"
55#include "mem/protocol/AccessType.hh"
56#include "mem/protocol/PrefetchBit.hh"
57#include "mem/protocol/RubyAccessMode.hh"
58#include "mem/protocol/RubyRequestType.hh"
59#include "mem/ruby/common/Global.hh"
60#include "mem/ruby/common/MachineID.hh"
61#include "params/RubySystem.hh"
62
63class RubyRequest;
64class AddressProfiler;
65
66class Profiler
67{
68  public:
69    Profiler(const RubySystemParams *params);
70    ~Profiler();
71
72    void wakeup();
73    void regStats(const std::string &name);
74    void collateStats();
75
76    AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
77    AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
78
79    void addAddressTraceSample(const RubyRequest& msg, NodeID id);
80
81    // added by SS
82    bool getHotLines() { return m_hot_lines; }
83    bool getAllInstructions() { return m_all_instructions; }
84
85  private:
86    // Private copy constructor and assignment operator
87    Profiler(const Profiler& obj);
88    Profiler& operator=(const Profiler& obj);
89
90    AddressProfiler* m_address_profiler_ptr;
91    AddressProfiler* m_inst_profiler_ptr;
92
93    Stats::Histogram delayHistogram;
94    std::vector<Stats::Histogram *> delayVCHistogram;
95
96    //! Histogram for number of outstanding requests per cycle.
97    Stats::Histogram m_outstandReqHist;
98
99    //! Histogram for holding latency profile of all requests.
100    Stats::Histogram m_latencyHist;
101    std::vector<Stats::Histogram *> m_typeLatencyHist;
102
103    //! Histogram for holding latency profile of all requests that
104    //! hit in the controller connected to this sequencer.
105    Stats::Histogram m_hitLatencyHist;
106    std::vector<Stats::Histogram *> m_hitTypeLatencyHist;
107
108    //! Histograms for profiling the latencies for requests that
109    //! did not required external messages.
110    std::vector<Stats::Histogram *> m_hitMachLatencyHist;
111    std::vector< std::vector<Stats::Histogram *> > m_hitTypeMachLatencyHist;
112
113    //! Histogram for holding latency profile of all requests that
114    //! miss in the controller connected to this sequencer.
115    Stats::Histogram m_missLatencyHist;
116    std::vector<Stats::Histogram *> m_missTypeLatencyHist;
117
118    //! Histograms for profiling the latencies for requests that
119    //! required external messages.
120    std::vector<Stats::Histogram *> m_missMachLatencyHist;
121    std::vector< std::vector<Stats::Histogram *> > m_missTypeMachLatencyHist;
122
123    //! Histograms for recording the breakdown of miss latency
124    std::vector<Stats::Histogram *> m_IssueToInitialDelayHist;
125    std::vector<Stats::Histogram *> m_InitialToForwardDelayHist;
126    std::vector<Stats::Histogram *> m_ForwardToFirstResponseDelayHist;
127    std::vector<Stats::Histogram *> m_FirstResponseToCompletionDelayHist;
128    Stats::Scalar m_IncompleteTimes[MachineType_NUM];
129
130    //added by SS
131    bool m_hot_lines;
132    bool m_all_instructions;
133};
134
135#endif // __MEM_RUBY_PROFILER_PROFILER_HH__
136