Switch.hh revision 14184
12086SN/A/* 22086SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 35268Sksewell@umich.edu * All rights reserved. 42086SN/A * 52086SN/A * Redistribution and use in source and binary forms, with or without 62086SN/A * modification, are permitted provided that the following conditions are 72086SN/A * met: redistributions of source code must retain the above copyright 82086SN/A * notice, this list of conditions and the following disclaimer; 92086SN/A * redistributions in binary form must reproduce the above copyright 102086SN/A * notice, this list of conditions and the following disclaimer in the 112086SN/A * documentation and/or other materials provided with the distribution; 122086SN/A * neither the name of the copyright holders nor the names of its 132086SN/A * contributors may be used to endorse or promote products derived from 142086SN/A * this software without specific prior written permission. 152086SN/A * 162086SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172086SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182086SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192086SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202086SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212086SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222086SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232086SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242086SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252086SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262086SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272086SN/A */ 282665Ssaidi@eecs.umich.edu 292665Ssaidi@eecs.umich.edu/* 302665Ssaidi@eecs.umich.edu * The actual modelled switch. It use the perfect switch and a 312686Sksewell@umich.edu * Throttle object to control and bandwidth and timing *only for the 322086SN/A * output port*. So here we have un-realistic modelling, since the 334202Sbinkertn@umich.edu * order of PerfectSwitch and Throttle objects get woke up affect the 342086SN/A * message timing. A more accurate model would be having two set of 354202Sbinkertn@umich.edu * system states, one for this cycle, one for next cycle. And on the 368775Sgblack@eecs.umich.edu * cycle boundary swap the two set of states. 379022Sgblack@eecs.umich.edu */ 388758Sgblack@eecs.umich.edu 394202Sbinkertn@umich.edu#ifndef __MEM_RUBY_NETWORK_SIMPLE_SWITCH_HH__ 408775Sgblack@eecs.umich.edu#define __MEM_RUBY_NETWORK_SIMPLE_SWITCH_HH__ 418745Sgblack@eecs.umich.edu 426313Sgblack@eecs.umich.edu#include <iostream> 438775Sgblack@eecs.umich.edu#include <vector> 448775Sgblack@eecs.umich.edu 458775Sgblack@eecs.umich.edu#include "mem/packet.hh" 468758Sgblack@eecs.umich.edu#include "mem/ruby/common/TypeDefines.hh" 478775Sgblack@eecs.umich.edu#include "mem/ruby/network/BasicRouter.hh" 488758Sgblack@eecs.umich.edu#include "mem/ruby/protocol/MessageSizeType.hh" 498775Sgblack@eecs.umich.edu#include "params/Switch.hh" 508775Sgblack@eecs.umich.edu 514997Sgblack@eecs.umich.educlass MessageBuffer; 524202Sbinkertn@umich.educlass PerfectSwitch; 538758Sgblack@eecs.umich.educlass NetDest; 544997Sgblack@eecs.umich.educlass SimpleNetwork; 558745Sgblack@eecs.umich.educlass Throttle; 568775Sgblack@eecs.umich.edu 574997Sgblack@eecs.umich.educlass Switch : public BasicRouter 585192Ssaidi@eecs.umich.edu{ 598775Sgblack@eecs.umich.edu public: 602086SN/A typedef SwitchParams Params; 614202Sbinkertn@umich.edu Switch(const Params *p); 624202Sbinkertn@umich.edu ~Switch(); 634202Sbinkertn@umich.edu void init(); 644202Sbinkertn@umich.edu 654202Sbinkertn@umich.edu void addInPort(const std::vector<MessageBuffer*>& in); 664202Sbinkertn@umich.edu void addOutPort(const std::vector<MessageBuffer*>& out, 67 const NetDest& routing_table_entry, 68 Cycles link_latency, int bw_multiplier); 69 70 const Throttle* getThrottle(LinkID link_number) const; 71 72 void resetStats(); 73 void collateStats(); 74 void regStats(); 75 const Stats::Formula & getMsgCount(unsigned int type) const 76 { return m_msg_counts[type]; } 77 78 void print(std::ostream& out) const; 79 void init_net_ptr(SimpleNetwork* net_ptr) { m_network_ptr = net_ptr; } 80 81 bool functionalRead(Packet *); 82 uint32_t functionalWrite(Packet *); 83 84 private: 85 // Private copy constructor and assignment operator 86 Switch(const Switch& obj); 87 Switch& operator=(const Switch& obj); 88 89 PerfectSwitch* m_perfect_switch; 90 SimpleNetwork* m_network_ptr; 91 std::vector<Throttle*> m_throttles; 92 std::vector<MessageBuffer*> m_port_buffers; 93 unsigned m_num_connected_buffers; 94 95 // Statistical variables 96 Stats::Formula m_avg_utilization; 97 Stats::Formula m_msg_counts[MessageSizeType_NUM]; 98 Stats::Formula m_msg_bytes[MessageSizeType_NUM]; 99}; 100 101inline std::ostream& 102operator<<(std::ostream& out, const Switch& obj) 103{ 104 obj.print(out); 105 out << std::flush; 106 return out; 107} 108 109#endif // __MEM_RUBY_NETWORK_SIMPLE_SWITCH_HH__ 110