Topology.cc revision 9799
16145SN/A/* 26145SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 36145SN/A * All rights reserved. 46145SN/A * 56145SN/A * Redistribution and use in source and binary forms, with or without 66145SN/A * modification, are permitted provided that the following conditions are 76145SN/A * met: redistributions of source code must retain the above copyright 86145SN/A * notice, this list of conditions and the following disclaimer; 96145SN/A * redistributions in binary form must reproduce the above copyright 106145SN/A * notice, this list of conditions and the following disclaimer in the 116145SN/A * documentation and/or other materials provided with the distribution; 126145SN/A * neither the name of the copyright holders nor the names of its 136145SN/A * contributors may be used to endorse or promote products derived from 146145SN/A * this software without specific prior written permission. 156145SN/A * 166145SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176145SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186145SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196145SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206145SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216145SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226145SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236145SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246145SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256145SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266145SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276145SN/A */ 286145SN/A 297832SN/A#include <cassert> 307832SN/A 319356Snilay@cs.wisc.edu#include "base/trace.hh" 328232SN/A#include "debug/RubyNetwork.hh" 336154SN/A#include "mem/protocol/MachineType.hh" 347054SN/A#include "mem/ruby/common/NetDest.hh" 358257SBrad.Beckmann@amd.com#include "mem/ruby/network/BasicLink.hh" 368255SBrad.Beckmann@amd.com#include "mem/ruby/network/Topology.hh" 377054SN/A#include "mem/ruby/slicc_interface/AbstractController.hh" 386145SN/A 397055SN/Ausing namespace std; 407055SN/A 417054SN/Aconst int INFINITE_LATENCY = 10000; // Yes, this is a big hack 428257SBrad.Beckmann@amd.com 436145SN/A// Note: In this file, we use the first 2*m_nodes SwitchIDs to 446145SN/A// represent the input and output endpoint links. These really are 456145SN/A// not 'switches', as they will not have a Switch object allocated for 466145SN/A// them. The first m_nodes SwitchIDs are the links into the network, 476145SN/A// the second m_nodes set of SwitchIDs represent the the output queues 486145SN/A// of the network. 496145SN/A 506145SN/A// Helper functions based on chapter 29 of Cormen et al. 517054SN/Avoid extend_shortest_path(Matrix& current_dist, Matrix& latencies, 527054SN/A Matrix& inter_switches); 537054SN/AMatrix shortest_path(const Matrix& weights, Matrix& latencies, 547054SN/A Matrix& inter_switches); 557054SN/Abool link_is_shortest_path_to_node(SwitchID src, SwitchID next, 567054SN/A SwitchID final, const Matrix& weights, const Matrix& dist); 577054SN/ANetDest shortest_path_to_node(SwitchID src, SwitchID next, 587054SN/A const Matrix& weights, const Matrix& dist); 596145SN/A 609594Snilay@cs.wisc.eduTopology::Topology(uint32_t num_routers, vector<BasicExtLink *> ext_links, 619594Snilay@cs.wisc.edu vector<BasicIntLink *> int_links) 629594Snilay@cs.wisc.edu : m_number_of_switches(num_routers) 636145SN/A{ 648257SBrad.Beckmann@amd.com 656881SN/A // initialize component latencies record 667454SN/A m_component_latencies.resize(0); 677454SN/A m_component_inter_switches.resize(0); 686145SN/A 696881SN/A // Total nodes/controllers in network 706881SN/A // Must make sure this is called after the State Machine constructors 716879SN/A m_nodes = MachineType_base_number(MachineType_NUM); 726881SN/A assert(m_nodes > 1); 736285SN/A 749594Snilay@cs.wisc.edu if (m_nodes != ext_links.size()) { 756879SN/A fatal("m_nodes (%d) != ext_links vector length (%d)\n", 769594Snilay@cs.wisc.edu m_nodes, ext_links.size()); 776879SN/A } 786879SN/A 798257SBrad.Beckmann@amd.com // analyze both the internal and external links, create data structures 808257SBrad.Beckmann@amd.com // Note that the python created links are bi-directional, but that the 818257SBrad.Beckmann@amd.com // topology and networks utilize uni-directional links. Thus each 828257SBrad.Beckmann@amd.com // BasicLink is converted to two calls to add link, on for each direction 839594Snilay@cs.wisc.edu for (vector<BasicExtLink*>::const_iterator i = ext_links.begin(); 849594Snilay@cs.wisc.edu i != ext_links.end(); ++i) { 858257SBrad.Beckmann@amd.com BasicExtLink *ext_link = (*i); 868257SBrad.Beckmann@amd.com AbstractController *abs_cntrl = ext_link->params()->ext_node; 878257SBrad.Beckmann@amd.com BasicRouter *router = ext_link->params()->int_node; 886881SN/A 899496Snilay@cs.wisc.edu // Store the ExtLink pointers for later 908257SBrad.Beckmann@amd.com m_ext_link_vector.push_back(ext_link); 916881SN/A 928257SBrad.Beckmann@amd.com int ext_idx1 = abs_cntrl->params()->cntrl_id; 937054SN/A int ext_idx2 = ext_idx1 + m_nodes; 948257SBrad.Beckmann@amd.com int int_idx = router->params()->router_id + 2*m_nodes; 956145SN/A 968257SBrad.Beckmann@amd.com // create the internal uni-directional links in both directions 978257SBrad.Beckmann@amd.com // the first direction is marked: In 988257SBrad.Beckmann@amd.com addLink(ext_idx1, int_idx, ext_link, LinkDirection_In); 998257SBrad.Beckmann@amd.com // the first direction is marked: Out 1008257SBrad.Beckmann@amd.com addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out); 1017054SN/A } 1026145SN/A 1039594Snilay@cs.wisc.edu for (vector<BasicIntLink*>::const_iterator i = int_links.begin(); 1049594Snilay@cs.wisc.edu i != int_links.end(); ++i) { 1058257SBrad.Beckmann@amd.com BasicIntLink *int_link = (*i); 1068257SBrad.Beckmann@amd.com BasicRouter *router_a = int_link->params()->node_a; 1078257SBrad.Beckmann@amd.com BasicRouter *router_b = int_link->params()->node_b; 1086881SN/A 1098257SBrad.Beckmann@amd.com // Store the IntLink pointers for later 1108257SBrad.Beckmann@amd.com m_int_link_vector.push_back(int_link); 1118257SBrad.Beckmann@amd.com 1128257SBrad.Beckmann@amd.com int a = router_a->params()->router_id + 2*m_nodes; 1138257SBrad.Beckmann@amd.com int b = router_b->params()->router_id + 2*m_nodes; 1148257SBrad.Beckmann@amd.com 1158257SBrad.Beckmann@amd.com // create the internal uni-directional links in both directions 1168257SBrad.Beckmann@amd.com // the first direction is marked: In 1178257SBrad.Beckmann@amd.com addLink(a, b, int_link, LinkDirection_In); 1188257SBrad.Beckmann@amd.com // the second direction is marked: Out 1198257SBrad.Beckmann@amd.com addLink(b, a, int_link, LinkDirection_Out); 1207054SN/A } 1216145SN/A} 1226145SN/A 1238257SBrad.Beckmann@amd.comvoid 1249799Snilay@cs.wisc.eduTopology::createLinks(Network *net) 1257054SN/A{ 1267054SN/A // Find maximum switchID 1277054SN/A SwitchID max_switch_id = 0; 1288257SBrad.Beckmann@amd.com for (LinkMap::const_iterator i = m_link_map.begin(); 1298257SBrad.Beckmann@amd.com i != m_link_map.end(); ++i) { 1308257SBrad.Beckmann@amd.com std::pair<int, int> src_dest = (*i).first; 1318257SBrad.Beckmann@amd.com max_switch_id = max(max_switch_id, src_dest.first); 1328257SBrad.Beckmann@amd.com max_switch_id = max(max_switch_id, src_dest.second); 1337054SN/A } 1346881SN/A 1358257SBrad.Beckmann@amd.com // Initialize weight, latency, and inter switched vectors 1367054SN/A Matrix topology_weights; 1377054SN/A int num_switches = max_switch_id+1; 1387454SN/A topology_weights.resize(num_switches); 1397454SN/A m_component_latencies.resize(num_switches); 1407454SN/A m_component_inter_switches.resize(num_switches); 1417054SN/A 1427054SN/A for (int i = 0; i < topology_weights.size(); i++) { 1437454SN/A topology_weights[i].resize(num_switches); 1447454SN/A m_component_latencies[i].resize(num_switches); 1457454SN/A m_component_inter_switches[i].resize(num_switches); 1467054SN/A 1477054SN/A for (int j = 0; j < topology_weights[i].size(); j++) { 1487054SN/A topology_weights[i][j] = INFINITE_LATENCY; 1497054SN/A 1507054SN/A // initialize to invalid values 1517054SN/A m_component_latencies[i][j] = -1; 1527054SN/A 1537054SN/A // initially assume direct connections / no intermediate 1547054SN/A // switches between components 1557054SN/A m_component_inter_switches[i][j] = 0; 1567054SN/A } 1576145SN/A } 1586145SN/A 1597054SN/A // Set identity weights to zero 1607054SN/A for (int i = 0; i < topology_weights.size(); i++) { 1617054SN/A topology_weights[i][i] = 0; 1627054SN/A } 1636145SN/A 1647054SN/A // Fill in the topology weights and bandwidth multipliers 1658257SBrad.Beckmann@amd.com for (LinkMap::const_iterator i = m_link_map.begin(); 1668257SBrad.Beckmann@amd.com i != m_link_map.end(); ++i) { 1678257SBrad.Beckmann@amd.com std::pair<int, int> src_dest = (*i).first; 1688257SBrad.Beckmann@amd.com BasicLink* link = (*i).second.link; 1698257SBrad.Beckmann@amd.com int src = src_dest.first; 1708257SBrad.Beckmann@amd.com int dst = src_dest.second; 1718257SBrad.Beckmann@amd.com m_component_latencies[src][dst] = link->m_latency; 1728257SBrad.Beckmann@amd.com topology_weights[src][dst] = link->m_weight; 1737054SN/A } 1748257SBrad.Beckmann@amd.com 1757054SN/A // Walk topology and hookup the links 1767054SN/A Matrix dist = shortest_path(topology_weights, m_component_latencies, 1777054SN/A m_component_inter_switches); 1787054SN/A for (int i = 0; i < topology_weights.size(); i++) { 1797054SN/A for (int j = 0; j < topology_weights[i].size(); j++) { 1807054SN/A int weight = topology_weights[i][j]; 1817054SN/A if (weight > 0 && weight != INFINITE_LATENCY) { 1829799Snilay@cs.wisc.edu NetDest destination_set = 1839799Snilay@cs.wisc.edu shortest_path_to_node(i, j, topology_weights, dist); 1849799Snilay@cs.wisc.edu makeLink(net, i, j, destination_set); 1857054SN/A } 1867054SN/A } 1876895SN/A } 1886895SN/A} 1896895SN/A 1907054SN/Avoid 1918257SBrad.Beckmann@amd.comTopology::addLink(SwitchID src, SwitchID dest, BasicLink* link, 1928257SBrad.Beckmann@amd.com LinkDirection dir) 1937054SN/A{ 1947832SN/A assert(src <= m_number_of_switches+m_nodes+m_nodes); 1957832SN/A assert(dest <= m_number_of_switches+m_nodes+m_nodes); 1968257SBrad.Beckmann@amd.com 1978257SBrad.Beckmann@amd.com std::pair<int, int> src_dest_pair; 1988257SBrad.Beckmann@amd.com LinkEntry link_entry; 1998257SBrad.Beckmann@amd.com 2008257SBrad.Beckmann@amd.com src_dest_pair.first = src; 2018257SBrad.Beckmann@amd.com src_dest_pair.second = dest; 2028257SBrad.Beckmann@amd.com link_entry.direction = dir; 2038257SBrad.Beckmann@amd.com link_entry.link = link; 2048257SBrad.Beckmann@amd.com m_link_map[src_dest_pair] = link_entry; 2057054SN/A} 2067054SN/A 2077054SN/Avoid 2087054SN/ATopology::makeLink(Network *net, SwitchID src, SwitchID dest, 2099799Snilay@cs.wisc.edu const NetDest& routing_table_entry) 2107054SN/A{ 2117054SN/A // Make sure we're not trying to connect two end-point nodes 2127054SN/A // directly together 2137054SN/A assert(src >= 2 * m_nodes || dest >= 2 * m_nodes); 2147054SN/A 2158257SBrad.Beckmann@amd.com std::pair<int, int> src_dest; 2168257SBrad.Beckmann@amd.com LinkEntry link_entry; 2178257SBrad.Beckmann@amd.com 2187054SN/A if (src < m_nodes) { 2198257SBrad.Beckmann@amd.com src_dest.first = src; 2208257SBrad.Beckmann@amd.com src_dest.second = dest; 2218257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 2228257SBrad.Beckmann@amd.com net->makeInLink(src, dest - (2 * m_nodes), link_entry.link, 2239799Snilay@cs.wisc.edu link_entry.direction, routing_table_entry); 2247054SN/A } else if (dest < 2*m_nodes) { 2257054SN/A assert(dest >= m_nodes); 2268257SBrad.Beckmann@amd.com NodeID node = dest - m_nodes; 2278257SBrad.Beckmann@amd.com src_dest.first = src; 2288257SBrad.Beckmann@amd.com src_dest.second = dest; 2298257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 2308257SBrad.Beckmann@amd.com net->makeOutLink(src - (2 * m_nodes), node, link_entry.link, 2319799Snilay@cs.wisc.edu link_entry.direction, routing_table_entry); 2327054SN/A } else { 2338257SBrad.Beckmann@amd.com assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes)); 2348257SBrad.Beckmann@amd.com src_dest.first = src; 2358257SBrad.Beckmann@amd.com src_dest.second = dest; 2368257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 2378257SBrad.Beckmann@amd.com net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes), 2388257SBrad.Beckmann@amd.com link_entry.link, link_entry.direction, 2399799Snilay@cs.wisc.edu routing_table_entry); 2407054SN/A } 2417054SN/A} 2427054SN/A 2436145SN/A// The following all-pairs shortest path algorithm is based on the 2446145SN/A// discussion from Cormen et al., Chapter 26.1. 2457054SN/Avoid 2467054SN/Aextend_shortest_path(Matrix& current_dist, Matrix& latencies, 2477054SN/A Matrix& inter_switches) 2487054SN/A{ 2497054SN/A bool change = true; 2507054SN/A int nodes = current_dist.size(); 2516145SN/A 2527054SN/A while (change) { 2537054SN/A change = false; 2547054SN/A for (int i = 0; i < nodes; i++) { 2557054SN/A for (int j = 0; j < nodes; j++) { 2567054SN/A int minimum = current_dist[i][j]; 2577054SN/A int previous_minimum = minimum; 2587054SN/A int intermediate_switch = -1; 2597054SN/A for (int k = 0; k < nodes; k++) { 2607054SN/A minimum = min(minimum, 2617054SN/A current_dist[i][k] + current_dist[k][j]); 2627054SN/A if (previous_minimum != minimum) { 2637054SN/A intermediate_switch = k; 2647054SN/A inter_switches[i][j] = 2657054SN/A inter_switches[i][k] + 2667054SN/A inter_switches[k][j] + 1; 2677054SN/A } 2687054SN/A previous_minimum = minimum; 2697054SN/A } 2707054SN/A if (current_dist[i][j] != minimum) { 2717054SN/A change = true; 2727054SN/A current_dist[i][j] = minimum; 2737054SN/A assert(intermediate_switch >= 0); 2747054SN/A assert(intermediate_switch < latencies[i].size()); 2757054SN/A latencies[i][j] = latencies[i][intermediate_switch] + 2767054SN/A latencies[intermediate_switch][j]; 2777054SN/A } 2787054SN/A } 2796145SN/A } 2806145SN/A } 2816145SN/A} 2826145SN/A 2837054SN/AMatrix 2847054SN/Ashortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches) 2856145SN/A{ 2867054SN/A Matrix dist = weights; 2877054SN/A extend_shortest_path(dist, latencies, inter_switches); 2887054SN/A return dist; 2896145SN/A} 2906145SN/A 2917054SN/Abool 2927054SN/Alink_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final, 2937054SN/A const Matrix& weights, const Matrix& dist) 2946145SN/A{ 2957054SN/A return weights[src][next] + dist[next][final] == dist[src][final]; 2966145SN/A} 2976145SN/A 2987054SN/ANetDest 2997054SN/Ashortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights, 3007054SN/A const Matrix& dist) 3016145SN/A{ 3027054SN/A NetDest result; 3037054SN/A int d = 0; 3047054SN/A int machines; 3057054SN/A int max_machines; 3066145SN/A 3077054SN/A machines = MachineType_NUM; 3087054SN/A max_machines = MachineType_base_number(MachineType_NUM); 3096145SN/A 3107054SN/A for (int m = 0; m < machines; m++) { 3117054SN/A for (int i = 0; i < MachineType_base_count((MachineType)m); i++) { 3127054SN/A // we use "d+max_machines" below since the "destination" 3137054SN/A // switches for the machines are numbered 3147054SN/A // [MachineType_base_number(MachineType_NUM)... 3157054SN/A // 2*MachineType_base_number(MachineType_NUM)-1] for the 3167054SN/A // component network 3177054SN/A if (link_is_shortest_path_to_node(src, next, d + max_machines, 3187054SN/A weights, dist)) { 3197054SN/A MachineID mach = {(MachineType)m, i}; 3207054SN/A result.add(mach); 3217054SN/A } 3227054SN/A d++; 3237054SN/A } 3246145SN/A } 3256145SN/A 3267780SN/A DPRINTF(RubyNetwork, "Returning shortest path\n" 3277780SN/A "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, " 3287780SN/A "src: %d, next: %d, result: %s\n", 3297780SN/A (src-(2*max_machines)), (next-(2*max_machines)), 3307780SN/A src, next, result); 3316145SN/A 3327054SN/A return result; 3336145SN/A} 334