Topology.cc revision 11664
16145SN/A/* 26145SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 36145SN/A * All rights reserved. 46145SN/A * 56145SN/A * Redistribution and use in source and binary forms, with or without 66145SN/A * modification, are permitted provided that the following conditions are 76145SN/A * met: redistributions of source code must retain the above copyright 86145SN/A * notice, this list of conditions and the following disclaimer; 96145SN/A * redistributions in binary form must reproduce the above copyright 106145SN/A * notice, this list of conditions and the following disclaimer in the 116145SN/A * documentation and/or other materials provided with the distribution; 126145SN/A * neither the name of the copyright holders nor the names of its 136145SN/A * contributors may be used to endorse or promote products derived from 146145SN/A * this software without specific prior written permission. 156145SN/A * 166145SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176145SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186145SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196145SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206145SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216145SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226145SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236145SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246145SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256145SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266145SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276145SN/A */ 286145SN/A 297832SN/A#include <cassert> 307832SN/A 319356Snilay@cs.wisc.edu#include "base/trace.hh" 328232SN/A#include "debug/RubyNetwork.hh" 337054SN/A#include "mem/ruby/common/NetDest.hh" 348257SBrad.Beckmann@amd.com#include "mem/ruby/network/BasicLink.hh" 358255SBrad.Beckmann@amd.com#include "mem/ruby/network/Topology.hh" 367054SN/A#include "mem/ruby/slicc_interface/AbstractController.hh" 376145SN/A 387055SN/Ausing namespace std; 397055SN/A 407054SN/Aconst int INFINITE_LATENCY = 10000; // Yes, this is a big hack 418257SBrad.Beckmann@amd.com 426145SN/A// Note: In this file, we use the first 2*m_nodes SwitchIDs to 436145SN/A// represent the input and output endpoint links. These really are 446145SN/A// not 'switches', as they will not have a Switch object allocated for 456145SN/A// them. The first m_nodes SwitchIDs are the links into the network, 466145SN/A// the second m_nodes set of SwitchIDs represent the the output queues 476145SN/A// of the network. 486145SN/A 4911096Snilay@cs.wisc.eduTopology::Topology(uint32_t num_routers, 5011096Snilay@cs.wisc.edu const vector<BasicExtLink *> &ext_links, 5111096Snilay@cs.wisc.edu const vector<BasicIntLink *> &int_links) 5211096Snilay@cs.wisc.edu : m_nodes(ext_links.size()), m_number_of_switches(num_routers), 5311096Snilay@cs.wisc.edu m_ext_link_vector(ext_links), m_int_link_vector(int_links) 546145SN/A{ 556881SN/A // Total nodes/controllers in network 566881SN/A assert(m_nodes > 1); 576285SN/A 5811663Stushar@ece.gatech.edu // analyze both the internal and external links, create data structures. 5911663Stushar@ece.gatech.edu // The python created external links are bi-directional, 6011663Stushar@ece.gatech.edu // and the python created internal links are uni-directional. 6111663Stushar@ece.gatech.edu // The networks and topology utilize uni-directional links. 6211663Stushar@ece.gatech.edu // Thus each external link is converted to two calls to addLink, 6311663Stushar@ece.gatech.edu // one for each direction. 6411663Stushar@ece.gatech.edu // 6511663Stushar@ece.gatech.edu // External Links 669594Snilay@cs.wisc.edu for (vector<BasicExtLink*>::const_iterator i = ext_links.begin(); 679594Snilay@cs.wisc.edu i != ext_links.end(); ++i) { 688257SBrad.Beckmann@amd.com BasicExtLink *ext_link = (*i); 698257SBrad.Beckmann@amd.com AbstractController *abs_cntrl = ext_link->params()->ext_node; 708257SBrad.Beckmann@amd.com BasicRouter *router = ext_link->params()->int_node; 716881SN/A 7210078Snilay@cs.wisc.edu int machine_base_idx = MachineType_base_number(abs_cntrl->getType()); 739869Sjthestness@gmail.com int ext_idx1 = machine_base_idx + abs_cntrl->getVersion(); 747054SN/A int ext_idx2 = ext_idx1 + m_nodes; 758257SBrad.Beckmann@amd.com int int_idx = router->params()->router_id + 2*m_nodes; 766145SN/A 778257SBrad.Beckmann@amd.com // create the internal uni-directional links in both directions 7811663Stushar@ece.gatech.edu // ext to int 7911663Stushar@ece.gatech.edu addLink(ext_idx1, int_idx, ext_link); 8011663Stushar@ece.gatech.edu // int to ext 8111663Stushar@ece.gatech.edu addLink(int_idx, ext_idx2, ext_link); 827054SN/A } 836145SN/A 8411663Stushar@ece.gatech.edu // Internal Links 859594Snilay@cs.wisc.edu for (vector<BasicIntLink*>::const_iterator i = int_links.begin(); 869594Snilay@cs.wisc.edu i != int_links.end(); ++i) { 878257SBrad.Beckmann@amd.com BasicIntLink *int_link = (*i); 8811663Stushar@ece.gatech.edu BasicRouter *router_src = int_link->params()->src_node; 8911663Stushar@ece.gatech.edu BasicRouter *router_dst = int_link->params()->dst_node; 906881SN/A 9111664Stushar@ece.gatech.edu PortDirection src_outport = int_link->params()->src_outport; 9211664Stushar@ece.gatech.edu PortDirection dst_inport = int_link->params()->dst_inport; 9311664Stushar@ece.gatech.edu 948257SBrad.Beckmann@amd.com // Store the IntLink pointers for later 958257SBrad.Beckmann@amd.com m_int_link_vector.push_back(int_link); 968257SBrad.Beckmann@amd.com 9711663Stushar@ece.gatech.edu int src = router_src->params()->router_id + 2*m_nodes; 9811663Stushar@ece.gatech.edu int dst = router_dst->params()->router_id + 2*m_nodes; 998257SBrad.Beckmann@amd.com 10011663Stushar@ece.gatech.edu // create the internal uni-directional link from src to dst 10111664Stushar@ece.gatech.edu addLink(src, dst, int_link, src_outport, dst_inport); 1027054SN/A } 1036145SN/A} 1046145SN/A 1058257SBrad.Beckmann@amd.comvoid 1069799Snilay@cs.wisc.eduTopology::createLinks(Network *net) 1077054SN/A{ 1087054SN/A // Find maximum switchID 1097054SN/A SwitchID max_switch_id = 0; 1108257SBrad.Beckmann@amd.com for (LinkMap::const_iterator i = m_link_map.begin(); 1118257SBrad.Beckmann@amd.com i != m_link_map.end(); ++i) { 11210005Snilay@cs.wisc.edu std::pair<SwitchID, SwitchID> src_dest = (*i).first; 1138257SBrad.Beckmann@amd.com max_switch_id = max(max_switch_id, src_dest.first); 11411320Ssteve.reinhardt@amd.com max_switch_id = max(max_switch_id, src_dest.second); 1157054SN/A } 1166881SN/A 1178257SBrad.Beckmann@amd.com // Initialize weight, latency, and inter switched vectors 1187054SN/A int num_switches = max_switch_id+1; 11911096Snilay@cs.wisc.edu Matrix topology_weights(num_switches, 12011096Snilay@cs.wisc.edu vector<int>(num_switches, INFINITE_LATENCY)); 12111096Snilay@cs.wisc.edu Matrix component_latencies(num_switches, 12211096Snilay@cs.wisc.edu vector<int>(num_switches, -1)); 12311096Snilay@cs.wisc.edu Matrix component_inter_switches(num_switches, 12411096Snilay@cs.wisc.edu vector<int>(num_switches, 0)); 1256145SN/A 1267054SN/A // Set identity weights to zero 1277054SN/A for (int i = 0; i < topology_weights.size(); i++) { 1287054SN/A topology_weights[i][i] = 0; 1297054SN/A } 1306145SN/A 1317054SN/A // Fill in the topology weights and bandwidth multipliers 1328257SBrad.Beckmann@amd.com for (LinkMap::const_iterator i = m_link_map.begin(); 1338257SBrad.Beckmann@amd.com i != m_link_map.end(); ++i) { 1348257SBrad.Beckmann@amd.com std::pair<int, int> src_dest = (*i).first; 1358257SBrad.Beckmann@amd.com BasicLink* link = (*i).second.link; 1368257SBrad.Beckmann@amd.com int src = src_dest.first; 1378257SBrad.Beckmann@amd.com int dst = src_dest.second; 13811096Snilay@cs.wisc.edu component_latencies[src][dst] = link->m_latency; 1398257SBrad.Beckmann@amd.com topology_weights[src][dst] = link->m_weight; 1407054SN/A } 14111320Ssteve.reinhardt@amd.com 1427054SN/A // Walk topology and hookup the links 14311096Snilay@cs.wisc.edu Matrix dist = shortest_path(topology_weights, component_latencies, 14411096Snilay@cs.wisc.edu component_inter_switches); 14511096Snilay@cs.wisc.edu 1467054SN/A for (int i = 0; i < topology_weights.size(); i++) { 1477054SN/A for (int j = 0; j < topology_weights[i].size(); j++) { 1487054SN/A int weight = topology_weights[i][j]; 1497054SN/A if (weight > 0 && weight != INFINITE_LATENCY) { 1509799Snilay@cs.wisc.edu NetDest destination_set = 1519799Snilay@cs.wisc.edu shortest_path_to_node(i, j, topology_weights, dist); 1529799Snilay@cs.wisc.edu makeLink(net, i, j, destination_set); 1537054SN/A } 1547054SN/A } 1556895SN/A } 1566895SN/A} 1576895SN/A 1587054SN/Avoid 15911664Stushar@ece.gatech.eduTopology::addLink(SwitchID src, SwitchID dest, BasicLink* link, 16011664Stushar@ece.gatech.edu PortDirection src_outport_dirn, 16111664Stushar@ece.gatech.edu PortDirection dst_inport_dirn) 1627054SN/A{ 1637832SN/A assert(src <= m_number_of_switches+m_nodes+m_nodes); 1647832SN/A assert(dest <= m_number_of_switches+m_nodes+m_nodes); 16511320Ssteve.reinhardt@amd.com 1668257SBrad.Beckmann@amd.com std::pair<int, int> src_dest_pair; 1678257SBrad.Beckmann@amd.com LinkEntry link_entry; 1688257SBrad.Beckmann@amd.com 1698257SBrad.Beckmann@amd.com src_dest_pair.first = src; 1708257SBrad.Beckmann@amd.com src_dest_pair.second = dest; 1718257SBrad.Beckmann@amd.com link_entry.link = link; 17211664Stushar@ece.gatech.edu link_entry.src_outport_dirn = src_outport_dirn; 17311664Stushar@ece.gatech.edu link_entry.dst_inport_dirn = dst_inport_dirn; 1748257SBrad.Beckmann@amd.com m_link_map[src_dest_pair] = link_entry; 1757054SN/A} 1767054SN/A 1777054SN/Avoid 1787054SN/ATopology::makeLink(Network *net, SwitchID src, SwitchID dest, 1799799Snilay@cs.wisc.edu const NetDest& routing_table_entry) 1807054SN/A{ 1817054SN/A // Make sure we're not trying to connect two end-point nodes 1827054SN/A // directly together 1837054SN/A assert(src >= 2 * m_nodes || dest >= 2 * m_nodes); 1847054SN/A 1858257SBrad.Beckmann@amd.com std::pair<int, int> src_dest; 18611320Ssteve.reinhardt@amd.com LinkEntry link_entry; 1878257SBrad.Beckmann@amd.com 1887054SN/A if (src < m_nodes) { 1898257SBrad.Beckmann@amd.com src_dest.first = src; 1908257SBrad.Beckmann@amd.com src_dest.second = dest; 1918257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 19211663Stushar@ece.gatech.edu net->makeExtInLink(src, dest - (2 * m_nodes), link_entry.link, 19311663Stushar@ece.gatech.edu routing_table_entry); 1947054SN/A } else if (dest < 2*m_nodes) { 1957054SN/A assert(dest >= m_nodes); 1968257SBrad.Beckmann@amd.com NodeID node = dest - m_nodes; 1978257SBrad.Beckmann@amd.com src_dest.first = src; 1988257SBrad.Beckmann@amd.com src_dest.second = dest; 1998257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 20011663Stushar@ece.gatech.edu net->makeExtOutLink(src - (2 * m_nodes), node, link_entry.link, 20111663Stushar@ece.gatech.edu routing_table_entry); 2027054SN/A } else { 2038257SBrad.Beckmann@amd.com assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes)); 2048257SBrad.Beckmann@amd.com src_dest.first = src; 2058257SBrad.Beckmann@amd.com src_dest.second = dest; 2068257SBrad.Beckmann@amd.com link_entry = m_link_map[src_dest]; 2078257SBrad.Beckmann@amd.com net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes), 20811663Stushar@ece.gatech.edu link_entry.link, 20911664Stushar@ece.gatech.edu routing_table_entry, 21011664Stushar@ece.gatech.edu link_entry.src_outport_dirn, 21111664Stushar@ece.gatech.edu link_entry.dst_inport_dirn); 2127054SN/A } 2137054SN/A} 2147054SN/A 2156145SN/A// The following all-pairs shortest path algorithm is based on the 2166145SN/A// discussion from Cormen et al., Chapter 26.1. 2177054SN/Avoid 21811096Snilay@cs.wisc.eduTopology::extend_shortest_path(Matrix ¤t_dist, Matrix &latencies, 21911096Snilay@cs.wisc.edu Matrix &inter_switches) 2207054SN/A{ 2217054SN/A bool change = true; 2227054SN/A int nodes = current_dist.size(); 2236145SN/A 2247054SN/A while (change) { 2257054SN/A change = false; 2267054SN/A for (int i = 0; i < nodes; i++) { 2277054SN/A for (int j = 0; j < nodes; j++) { 2287054SN/A int minimum = current_dist[i][j]; 2297054SN/A int previous_minimum = minimum; 2307054SN/A int intermediate_switch = -1; 2317054SN/A for (int k = 0; k < nodes; k++) { 2327054SN/A minimum = min(minimum, 2337054SN/A current_dist[i][k] + current_dist[k][j]); 2347054SN/A if (previous_minimum != minimum) { 2357054SN/A intermediate_switch = k; 2367054SN/A inter_switches[i][j] = 2377054SN/A inter_switches[i][k] + 2387054SN/A inter_switches[k][j] + 1; 2397054SN/A } 2407054SN/A previous_minimum = minimum; 2417054SN/A } 2427054SN/A if (current_dist[i][j] != minimum) { 2437054SN/A change = true; 2447054SN/A current_dist[i][j] = minimum; 2457054SN/A assert(intermediate_switch >= 0); 2467054SN/A assert(intermediate_switch < latencies[i].size()); 2477054SN/A latencies[i][j] = latencies[i][intermediate_switch] + 2487054SN/A latencies[intermediate_switch][j]; 2497054SN/A } 2507054SN/A } 2516145SN/A } 2526145SN/A } 2536145SN/A} 2546145SN/A 2557054SN/AMatrix 25611096Snilay@cs.wisc.eduTopology::shortest_path(const Matrix &weights, Matrix &latencies, 25711096Snilay@cs.wisc.edu Matrix &inter_switches) 2586145SN/A{ 2597054SN/A Matrix dist = weights; 2607054SN/A extend_shortest_path(dist, latencies, inter_switches); 2617054SN/A return dist; 2626145SN/A} 2636145SN/A 2647054SN/Abool 26511096Snilay@cs.wisc.eduTopology::link_is_shortest_path_to_node(SwitchID src, SwitchID next, 26611096Snilay@cs.wisc.edu SwitchID final, const Matrix &weights, 26711096Snilay@cs.wisc.edu const Matrix &dist) 2686145SN/A{ 2697054SN/A return weights[src][next] + dist[next][final] == dist[src][final]; 2706145SN/A} 2716145SN/A 2727054SN/ANetDest 27311096Snilay@cs.wisc.eduTopology::shortest_path_to_node(SwitchID src, SwitchID next, 27411096Snilay@cs.wisc.edu const Matrix &weights, const Matrix &dist) 2756145SN/A{ 2767054SN/A NetDest result; 2777054SN/A int d = 0; 2787054SN/A int machines; 2797054SN/A int max_machines; 2806145SN/A 2817054SN/A machines = MachineType_NUM; 2827054SN/A max_machines = MachineType_base_number(MachineType_NUM); 2836145SN/A 2847054SN/A for (int m = 0; m < machines; m++) { 28510005Snilay@cs.wisc.edu for (NodeID i = 0; i < MachineType_base_count((MachineType)m); i++) { 2867054SN/A // we use "d+max_machines" below since the "destination" 2877054SN/A // switches for the machines are numbered 2887054SN/A // [MachineType_base_number(MachineType_NUM)... 2897054SN/A // 2*MachineType_base_number(MachineType_NUM)-1] for the 2907054SN/A // component network 2917054SN/A if (link_is_shortest_path_to_node(src, next, d + max_machines, 2927054SN/A weights, dist)) { 2937054SN/A MachineID mach = {(MachineType)m, i}; 2947054SN/A result.add(mach); 2957054SN/A } 2967054SN/A d++; 2977054SN/A } 2986145SN/A } 2996145SN/A 3007780SN/A DPRINTF(RubyNetwork, "Returning shortest path\n" 3017780SN/A "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, " 3027780SN/A "src: %d, next: %d, result: %s\n", 3037780SN/A (src-(2*max_machines)), (next-(2*max_machines)), 3047780SN/A src, next, result); 3056145SN/A 3067054SN/A return result; 3076145SN/A} 308