Address.hh revision 6285:ce086eca1ede
12131SN/A 22131SN/A/* 32131SN/A * Copyright (c) 1999 Mark D. Hill and David A. Wood 42131SN/A * All rights reserved. 52131SN/A * 62131SN/A * Redistribution and use in source and binary forms, with or without 72131SN/A * modification, are permitted provided that the following conditions are 82131SN/A * met: redistributions of source code must retain the above copyright 92131SN/A * notice, this list of conditions and the following disclaimer; 102131SN/A * redistributions in binary form must reproduce the above copyright 112131SN/A * notice, this list of conditions and the following disclaimer in the 122131SN/A * documentation and/or other materials provided with the distribution; 132131SN/A * neither the name of the copyright holders nor the names of its 142131SN/A * contributors may be used to endorse or promote products derived from 152131SN/A * this software without specific prior written permission. 162131SN/A * 172131SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182131SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192131SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202131SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212131SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222131SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232131SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242131SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252131SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262131SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272665Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282935Sksewell@umich.edu */ 292935Sksewell@umich.edu 302131SN/A/* 312131SN/A * $Id$ 322239SN/A */ 332239SN/A 342131SN/A#ifndef ADDRESS_H 352131SN/A#define ADDRESS_H 362447SN/A 372447SN/A#include <iomanip> 382447SN/A#include "mem/ruby/common/Global.hh" 392447SN/A#include "mem/ruby/system/System.hh" 402447SN/A#include "mem/ruby/system/NodeID.hh" 412447SN/A#include "mem/ruby/system/MachineID.hh" 422447SN/A 432131SN/Aconst int ADDRESS_WIDTH = 64; // address width in bytes 442239SN/A 452131SN/Aclass Address; 462447SN/Atypedef Address PhysAddress; 472447SN/Atypedef Address VirtAddress; 482447SN/A 492131SN/Aclass Address { 502447SN/Apublic: 512680Sktlim@umich.edu // Constructors 522447SN/A Address() { m_address = 0; } 532447SN/A explicit Address(physical_address_t address) { m_address = address; } 542447SN/A 552131SN/A Address(const Address& obj); 562131SN/A Address& operator=(const Address& obj); 572447SN/A 582131SN/A // Destructor 592447SN/A // ~Address(); 602447SN/A 612447SN/A // Public Methods 622447SN/A 632131SN/A void setAddress(physical_address_t address) { m_address = address; } 642447SN/A physical_address_t getAddress() const {return m_address;} 652447SN/A // selects bits inclusive 662447SN/A physical_address_t bitSelect(int small, int big) const; 672447SN/A physical_address_t maskLowOrderBits(int number) const; 682447SN/A physical_address_t maskHighOrderBits(int number) const; 692131SN/A physical_address_t shiftLowOrderBits(int number) const; 702447SN/A physical_address_t getLineAddress() const 712131SN/A { return bitSelect(RubySystem::getBlockSizeBits(), ADDRESS_WIDTH); } 722447SN/A physical_address_t getOffset() const 732447SN/A { return bitSelect(0, RubySystem::getBlockSizeBits()-1); } 742447SN/A 752447SN/A void makeLineAddress() { m_address = maskLowOrderBits(RubySystem::getBlockSizeBits()); } 762131SN/A // returns the next stride address based on line address 772447SN/A void makeNextStrideAddress( int stride) { 782447SN/A m_address = maskLowOrderBits(RubySystem::getBlockSizeBits()) 792447SN/A + RubySystem::getBlockSizeBytes()*stride; 802447SN/A } 812447SN/A int getBankSetNum() const; 822131SN/A int getBankSetDist() const; 834661Sksewell@umich.edu 844661Sksewell@umich.edu Index memoryModuleIndex() const; 854661Sksewell@umich.edu 864661Sksewell@umich.edu void print(ostream& out) const; 874661Sksewell@umich.edu void output(ostream& out) const; 884661Sksewell@umich.edu void input(istream& in); 894661Sksewell@umich.edu 904661Sksewell@umich.edu void setOffset( int offset ){ 914661Sksewell@umich.edu // first, zero out the offset bits 924661Sksewell@umich.edu makeLineAddress(); 934661Sksewell@umich.edu m_address |= (physical_address_t) offset; 944661Sksewell@umich.edu } 954661Sksewell@umich.edu 964661Sksewell@umich.eduprivate: 974661Sksewell@umich.edu // Private Methods 984661Sksewell@umich.edu 994661Sksewell@umich.edu // Private copy constructor and assignment operator 1004661Sksewell@umich.edu // Address(const Address& obj); 1014661Sksewell@umich.edu // Address& operator=(const Address& obj); 1024661Sksewell@umich.edu 1034661Sksewell@umich.edu // Data Members (m_ prefix) 1044661Sksewell@umich.edu physical_address_t m_address; 1054661Sksewell@umich.edu}; 1064661Sksewell@umich.edu 1074661Sksewell@umich.eduinline 1084661Sksewell@umich.eduAddress line_address(const Address& addr) { Address temp(addr); temp.makeLineAddress(); return temp; } 1094661Sksewell@umich.edu 1104661Sksewell@umich.edu/* 1114661Sksewell@umich.eduinline 1124661Sksewell@umich.eduAddress next_stride_address(const Address& addr, int stride) { 1134661Sksewell@umich.edu Address temp = addr; 1144661Sksewell@umich.edu temp.makeNextStrideAddress(stride); 1154661Sksewell@umich.edu temp.setAddress(temp.maskHighOrderBits(ADDRESS_WIDTH-RubyConfig::memorySizeBits())); // surpress wrap-around problem 1164661Sksewell@umich.edu return temp; 1174661Sksewell@umich.edu} 1184661Sksewell@umich.edu*/ 1192447SN/A 1202131SN/A// Output operator declaration 1212447SN/Aostream& operator<<(ostream& out, const Address& obj); 1222447SN/A// comparison operator declaration 1232447SN/Abool operator==(const Address& obj1, const Address& obj2); 1242447SN/Abool operator!=(const Address& obj1, const Address& obj2); 1252447SN/Abool operator<(const Address& obj1, const Address& obj2); 1262447SN/A/* Address& operator=(const physical_address_t address); */ 1272447SN/A 1282447SN/Ainline 1292447SN/Abool operator<(const Address& obj1, const Address& obj2) 1302447SN/A{ 1312447SN/A return obj1.getAddress() < obj2.getAddress(); 1322447SN/A} 1332447SN/A 1342447SN/A// ******************* Definitions ******************* 1352131SN/A 1362447SN/A// Output operator definition 1372447SN/Ainline 1382447SN/Aostream& operator<<(ostream& out, const Address& obj) 1394661Sksewell@umich.edu{ 1402447SN/A obj.print(out); 1412131SN/A out << flush; 1424661Sksewell@umich.edu return out; 1434661Sksewell@umich.edu} 1444661Sksewell@umich.edu 1454661Sksewell@umich.eduinline 1464661Sksewell@umich.edubool operator==(const Address& obj1, const Address& obj2) 1474661Sksewell@umich.edu{ 1484661Sksewell@umich.edu return (obj1.getAddress() == obj2.getAddress()); 1494661Sksewell@umich.edu} 1504661Sksewell@umich.edu 1514661Sksewell@umich.eduinline 1524661Sksewell@umich.edubool operator!=(const Address& obj1, const Address& obj2) 1534661Sksewell@umich.edu{ 1544661Sksewell@umich.edu return (obj1.getAddress() != obj2.getAddress()); 1554661Sksewell@umich.edu} 1564661Sksewell@umich.edu 1574661Sksewell@umich.eduinline 1584661Sksewell@umich.eduphysical_address_t Address::bitSelect(int small, int big) const // rips bits inclusive 1594661Sksewell@umich.edu{ 1604661Sksewell@umich.edu physical_address_t mask; 1614661Sksewell@umich.edu assert(big >= small); 1624661Sksewell@umich.edu 1634661Sksewell@umich.edu if (big >= ADDRESS_WIDTH - 1) { 1644661Sksewell@umich.edu return (m_address >> small); 1654661Sksewell@umich.edu } else { 1664661Sksewell@umich.edu mask = ~((physical_address_t)~0 << (big + 1)); 1674661Sksewell@umich.edu // FIXME - this is slow to manipulate a 64-bit number using 32-bits 1684661Sksewell@umich.edu physical_address_t partial = (m_address & mask); 1694661Sksewell@umich.edu return (partial >> small); 1704661Sksewell@umich.edu } 1714661Sksewell@umich.edu} 1724661Sksewell@umich.edu 1734661Sksewell@umich.eduinline 1744661Sksewell@umich.eduphysical_address_t Address::maskLowOrderBits(int number) const 1754661Sksewell@umich.edu{ 1764661Sksewell@umich.edu physical_address_t mask; 1774661Sksewell@umich.edu 1784661Sksewell@umich.edu if (number >= ADDRESS_WIDTH - 1) { 1794661Sksewell@umich.edu mask = ~0; 1804661Sksewell@umich.edu } else { 1814661Sksewell@umich.edu mask = (physical_address_t)~0 << number; 1822447SN/A } 1832131SN/A return (m_address & mask); 1842447SN/A} 1852447SN/A 1862447SN/Ainline 1872447SN/Aphysical_address_t Address::maskHighOrderBits(int number) const 1882447SN/A{ 1892447SN/A physical_address_t mask; 1902131SN/A 1912447SN/A if (number >= ADDRESS_WIDTH - 1) { 1922447SN/A mask = ~0; 1932447SN/A } else { 1942447SN/A mask = (physical_address_t)~0 >> number; 1952680Sktlim@umich.edu } 1962447SN/A return (m_address & mask); 1972447SN/A} 1982131SN/A 1992447SN/Ainline 2002131SN/Aphysical_address_t Address::shiftLowOrderBits(int number) const 2012447SN/A{ 2022447SN/A return (m_address >> number); 2032447SN/A} 2042447SN/A 2052447SN/Ainline 2062447SN/Ainteger_t Address::memoryModuleIndex() const 2072131SN/A{ 2082447SN/A integer_t index = bitSelect(RubySystem::getBlockSizeBits()+RubySystem::getMemorySizeBits(), ADDRESS_WIDTH); 2092447SN/A assert (index >= 0); 2102447SN/A /* 2112447SN/A if (index >= RubyConfig::memoryModuleBlocks()) { 2122131SN/A cerr << " memoryBits: " << RubySystem::getMemorySizeBits() << " memorySizeBits: " << RubySystem::getMemorySizeBits() 2132447SN/A << " Address: " << "[" << hex << "0x" << m_address << "," << " line 0x" << maskLowOrderBits(RubySystem::getBlockSizeBits()) << dec << "]" << flush 2142131SN/A << "error: limit exceeded. " << 2152447SN/A " getDataBlockBits: " << RubySystem::getBlockSizeBits() << 2162447SN/A " memoryModuleBlocks: " << RubyConfig::memoryModuleBlocks() << 2172447SN/A " index: " << index << endl; 2182447SN/A } 2192131SN/A assert (index < RubyConfig::memoryModuleBlocks()); 2202447SN/A */ 2212447SN/A return index; 2222447SN/A 2232447SN/A // Index indexHighPortion = address.bitSelect(MEMORY_SIZE_BITS-1, PAGE_SIZE_BITS+NUMBER_OF_MEMORY_MODULE_BITS); 2242131SN/A // Index indexLowPortion = address.bitSelect(DATA_BLOCK_BITS, PAGE_SIZE_BITS-1); 2252447SN/A 2262131SN/A //Index index = indexLowPortion | (indexHighPortion << (PAGE_SIZE_BITS - DATA_BLOCK_BITS)); 2272447SN/A 2282447SN/A /* 2292447SN/A Round-robin mapping of addresses, at page size granularity 2302447SN/A 2312131SN/AADDRESS_WIDTH MEMORY_SIZE_BITS PAGE_SIZE_BITS DATA_BLOCK_BITS 2322447SN/A | | | | 2332447SN/A \ / \ / \ / \ / 0 2342447SN/A ----------------------------------------------------------------------- 2352447SN/A | unused |xxxxxxxxxxxxxxx| |xxxxxxxxxxxxxxx| | 2362131SN/A | |xxxxxxxxxxxxxxx| |xxxxxxxxxxxxxxx| | 2372447SN/A ----------------------------------------------------------------------- 2382131SN/A indexHighPortion indexLowPortion 2392447SN/A <-------> 2402447SN/A NUMBER_OF_MEMORY_MODULE_BITS 2412447SN/A */ 2422447SN/A} 2432131SN/A 2442447SN/Ainline 2452447SN/Avoid Address::print(ostream& out) const 2462447SN/A{ 2472447SN/A out << "[" << hex << "0x" << m_address << "," << " line 0x" << maskLowOrderBits(RubySystem::getBlockSizeBits()) << dec << "]" << flush; 2482131SN/A} 2492447SN/A 2502131SN/Aclass Address; 2512447SN/Anamespace __gnu_cxx { 2522447SN/A template <> struct hash<Address> 2532447SN/A { 2542447SN/A size_t operator()(const Address &s) const { return (size_t) s.getAddress(); } 2552131SN/A }; 2562447SN/A} 2572447SN/Anamespace std { 2582447SN/A template <> struct equal_to<Address> 2592447SN/A { 2602131SN/A bool operator()(const Address& s1, const Address& s2) const { return s1 == s2; } 2612447SN/A }; 2622131SN/A} 2632447SN/A 2642447SN/A#endif //ADDRESS_H 2652447SN/A 2662447SN/A