port.cc revision 14193:7dd8a6df30e2 
1/*
2 * Copyright (c) 2012,2015,2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Steve Reinhardt
41 *          Andreas Hansson
42 *          William Wang
43 */
44
45/**
46 * @file
47 * Port object definitions.
48 */
49#include "mem/port.hh"
50
51#include "base/trace.hh"
52#include "sim/sim_object.hh"
53
54/**
55 * Master port
56 */
57MasterPort::MasterPort(const std::string& name, SimObject* _owner, PortID _id)
58    : Port(name, _id), _slavePort(NULL), owner(*_owner)
59{
60}
61
62MasterPort::~MasterPort()
63{
64}
65
66void
67MasterPort::bind(Port &peer)
68{
69    auto *slave_port = dynamic_cast<SlavePort *>(&peer);
70    if (!slave_port) {
71        fatal("Attempt to bind port %s to non-slave port %s.",
72                name(), peer.name());
73    }
74    // master port keeps track of the slave port
75    _slavePort = slave_port;
76    Port::bind(peer);
77    // slave port also keeps track of master port
78    _slavePort->slaveBind(*this);
79}
80
81void
82MasterPort::unbind()
83{
84    if (_slavePort == NULL)
85        panic("Attempting to unbind master port %s that is not connected\n",
86              name());
87    _slavePort->slaveUnbind();
88    _slavePort = nullptr;
89    Port::unbind();
90}
91
92AddrRangeList
93MasterPort::getAddrRanges() const
94{
95    return _slavePort->getAddrRanges();
96}
97
98void
99MasterPort::printAddr(Addr a)
100{
101    auto req = std::make_shared<Request>(
102        a, 1, 0, Request::funcMasterId);
103
104    Packet pkt(req, MemCmd::PrintReq);
105    Packet::PrintReqState prs(std::cerr);
106    pkt.senderState = &prs;
107
108    sendFunctional(&pkt);
109}
110
111/**
112 * Slave port
113 */
114SlavePort::SlavePort(const std::string& name, SimObject* _owner, PortID id)
115    : Port(name, id), _masterPort(NULL), defaultBackdoorWarned(false),
116    owner(*_owner)
117{
118}
119
120SlavePort::~SlavePort()
121{
122}
123
124void
125SlavePort::slaveUnbind()
126{
127    _masterPort = NULL;
128    Port::unbind();
129}
130
131void
132SlavePort::slaveBind(MasterPort& master_port)
133{
134    _masterPort = &master_port;
135    Port::bind(master_port);
136}
137
138Tick
139SlavePort::recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &backdoor)
140{
141    if (!defaultBackdoorWarned) {
142        warn("Port %s doesn't support requesting a back door.", name());
143        defaultBackdoorWarned = true;
144    }
145    return recvAtomic(pkt);
146}
147