port.cc revision 12342:53a3828f2468
1/* 2 * Copyright (c) 2012,2015,2017 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Steve Reinhardt 41 * Andreas Hansson 42 * William Wang 43 */ 44 45/** 46 * @file 47 * Port object definitions. 48 */ 49#include "mem/port.hh" 50 51#include "base/trace.hh" 52#include "mem/mem_object.hh" 53 54Port::Port(const std::string &_name, MemObject& _owner, PortID _id) 55 : portName(_name), id(_id), owner(_owner) 56{ 57} 58 59Port::~Port() 60{ 61} 62 63BaseMasterPort::BaseMasterPort(const std::string& name, MemObject* owner, 64 PortID _id) 65 : Port(name, *owner, _id), _baseSlavePort(NULL) 66{ 67} 68 69BaseMasterPort::~BaseMasterPort() 70{ 71} 72 73BaseSlavePort& 74BaseMasterPort::getSlavePort() const 75{ 76 if (_baseSlavePort == NULL) 77 panic("Cannot getSlavePort on master port %s that is not connected\n", 78 name()); 79 80 return *_baseSlavePort; 81} 82 83bool 84BaseMasterPort::isConnected() const 85{ 86 return _baseSlavePort != NULL; 87} 88 89BaseSlavePort::BaseSlavePort(const std::string& name, MemObject* owner, 90 PortID _id) 91 : Port(name, *owner, _id), _baseMasterPort(NULL) 92{ 93} 94 95BaseSlavePort::~BaseSlavePort() 96{ 97} 98 99BaseMasterPort& 100BaseSlavePort::getMasterPort() const 101{ 102 if (_baseMasterPort == NULL) 103 panic("Cannot getMasterPort on slave port %s that is not connected\n", 104 name()); 105 106 return *_baseMasterPort; 107} 108 109bool 110BaseSlavePort::isConnected() const 111{ 112 return _baseMasterPort != NULL; 113} 114 115/** 116 * Master port 117 */ 118MasterPort::MasterPort(const std::string& name, MemObject* owner, PortID _id) 119 : BaseMasterPort(name, owner, _id), _slavePort(NULL) 120{ 121} 122 123MasterPort::~MasterPort() 124{ 125} 126 127void 128MasterPort::bind(BaseSlavePort& slave_port) 129{ 130 // bind on the level of the base ports 131 _baseSlavePort = &slave_port; 132 133 // also attempt to base the slave to the appropriate type 134 SlavePort* cast_slave_port = dynamic_cast<SlavePort*>(&slave_port); 135 136 // if this port is compatible, then proceed with the binding 137 if (cast_slave_port != NULL) { 138 // master port keeps track of the slave port 139 _slavePort = cast_slave_port; 140 // slave port also keeps track of master port 141 _slavePort->bind(*this); 142 } else { 143 fatal("Master port %s cannot bind to %s\n", name(), 144 slave_port.name()); 145 } 146} 147 148void 149MasterPort::unbind() 150{ 151 if (_slavePort == NULL) 152 panic("Attempting to unbind master port %s that is not connected\n", 153 name()); 154 _slavePort->unbind(); 155 _slavePort = NULL; 156 _baseSlavePort = NULL; 157} 158 159AddrRangeList 160MasterPort::getAddrRanges() const 161{ 162 return _slavePort->getAddrRanges(); 163} 164 165Tick 166MasterPort::sendAtomic(PacketPtr pkt) 167{ 168 assert(pkt->isRequest()); 169 return _slavePort->recvAtomic(pkt); 170} 171 172void 173MasterPort::sendFunctional(PacketPtr pkt) 174{ 175 assert(pkt->isRequest()); 176 return _slavePort->recvFunctional(pkt); 177} 178 179bool 180MasterPort::sendTimingReq(PacketPtr pkt) 181{ 182 assert(pkt->isRequest()); 183 return _slavePort->recvTimingReq(pkt); 184} 185 186bool 187MasterPort::tryTiming(PacketPtr pkt) const 188{ 189 assert(pkt->isRequest()); 190 return _slavePort->tryTiming(pkt); 191} 192 193bool 194MasterPort::sendTimingSnoopResp(PacketPtr pkt) 195{ 196 assert(pkt->isResponse()); 197 return _slavePort->recvTimingSnoopResp(pkt); 198} 199 200void 201MasterPort::sendRetryResp() 202{ 203 _slavePort->recvRespRetry(); 204} 205 206void 207MasterPort::printAddr(Addr a) 208{ 209 Request req(a, 1, 0, Request::funcMasterId); 210 Packet pkt(&req, MemCmd::PrintReq); 211 Packet::PrintReqState prs(std::cerr); 212 pkt.senderState = &prs; 213 214 sendFunctional(&pkt); 215} 216 217/** 218 * Slave port 219 */ 220SlavePort::SlavePort(const std::string& name, MemObject* owner, PortID id) 221 : BaseSlavePort(name, owner, id), _masterPort(NULL) 222{ 223} 224 225SlavePort::~SlavePort() 226{ 227} 228 229void 230SlavePort::unbind() 231{ 232 _baseMasterPort = NULL; 233 _masterPort = NULL; 234} 235 236void 237SlavePort::bind(MasterPort& master_port) 238{ 239 _baseMasterPort = &master_port; 240 _masterPort = &master_port; 241} 242 243Tick 244SlavePort::sendAtomicSnoop(PacketPtr pkt) 245{ 246 assert(pkt->isRequest()); 247 return _masterPort->recvAtomicSnoop(pkt); 248} 249 250void 251SlavePort::sendFunctionalSnoop(PacketPtr pkt) 252{ 253 assert(pkt->isRequest()); 254 return _masterPort->recvFunctionalSnoop(pkt); 255} 256 257bool 258SlavePort::sendTimingResp(PacketPtr pkt) 259{ 260 assert(pkt->isResponse()); 261 return _masterPort->recvTimingResp(pkt); 262} 263 264void 265SlavePort::sendTimingSnoopReq(PacketPtr pkt) 266{ 267 assert(pkt->isRequest()); 268 _masterPort->recvTimingSnoopReq(pkt); 269} 270 271void 272SlavePort::sendRetryReq() 273{ 274 _masterPort->recvReqRetry(); 275} 276 277void 278SlavePort::sendRetrySnoopResp() 279{ 280 _masterPort->recvRetrySnoopResp(); 281} 282