physical.cc revision 4475:fb185cc1c845
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 *          Ali Saidi
30 */
31
32#include <sys/types.h>
33#include <sys/mman.h>
34#include <errno.h>
35#include <fcntl.h>
36#include <unistd.h>
37#include <zlib.h>
38
39#include <iostream>
40#include <string>
41
42#include "arch/isa_traits.hh"
43#include "base/misc.hh"
44#include "config/full_system.hh"
45#include "mem/packet_access.hh"
46#include "mem/physical.hh"
47#include "sim/builder.hh"
48#include "sim/eventq.hh"
49#include "sim/host.hh"
50
51using namespace std;
52using namespace TheISA;
53
54PhysicalMemory::PhysicalMemory(Params *p)
55    : MemObject(p->name), pmemAddr(NULL), lat(p->latency), _params(p)
56{
57    if (params()->addrRange.size() % TheISA::PageBytes != 0)
58        panic("Memory Size not divisible by page size\n");
59
60    int map_flags = MAP_ANON | MAP_PRIVATE;
61    pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
62            map_flags, -1, 0);
63
64    if (pmemAddr == (void *)MAP_FAILED) {
65        perror("mmap");
66        fatal("Could not mmap!\n");
67    }
68
69    //If requested, initialize all the memory to 0
70    if(params()->zero)
71        memset(pmemAddr, 0, params()->addrRange.size());
72
73    pagePtr = 0;
74}
75
76void
77PhysicalMemory::init()
78{
79    if (ports.size() == 0) {
80        fatal("PhysicalMemory object %s is unconnected!", name());
81    }
82
83    for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
84        if (*pi)
85            (*pi)->sendStatusChange(Port::RangeChange);
86    }
87}
88
89PhysicalMemory::~PhysicalMemory()
90{
91    if (pmemAddr)
92        munmap((char*)pmemAddr, params()->addrRange.size());
93    //Remove memPorts?
94}
95
96Addr
97PhysicalMemory::new_page()
98{
99    Addr return_addr = pagePtr << LogVMPageSize;
100    return_addr += start();
101
102    ++pagePtr;
103    return return_addr;
104}
105
106int
107PhysicalMemory::deviceBlockSize()
108{
109    //Can accept anysize request
110    return 0;
111}
112
113Tick
114PhysicalMemory::calculateLatency(PacketPtr pkt)
115{
116    return lat;
117}
118
119
120
121// Add load-locked to tracking list.  Should only be called if the
122// operation is a load and the LOCKED flag is set.
123void
124PhysicalMemory::trackLoadLocked(Request *req)
125{
126    Addr paddr = LockedAddr::mask(req->getPaddr());
127
128    // first we check if we already have a locked addr for this
129    // xc.  Since each xc only gets one, we just update the
130    // existing record with the new address.
131    list<LockedAddr>::iterator i;
132
133    for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) {
134        if (i->matchesContext(req)) {
135            DPRINTF(LLSC, "Modifying lock record: cpu %d thread %d addr %#x\n",
136                    req->getCpuNum(), req->getThreadNum(), paddr);
137            i->addr = paddr;
138            return;
139        }
140    }
141
142    // no record for this xc: need to allocate a new one
143    DPRINTF(LLSC, "Adding lock record: cpu %d thread %d addr %#x\n",
144            req->getCpuNum(), req->getThreadNum(), paddr);
145    lockedAddrList.push_front(LockedAddr(req));
146}
147
148
149// Called on *writes* only... both regular stores and
150// store-conditional operations.  Check for conventional stores which
151// conflict with locked addresses, and for success/failure of store
152// conditionals.
153bool
154PhysicalMemory::checkLockedAddrList(Request *req)
155{
156    Addr paddr = LockedAddr::mask(req->getPaddr());
157    bool isLocked = req->isLocked();
158
159    // Initialize return value.  Non-conditional stores always
160    // succeed.  Assume conditional stores will fail until proven
161    // otherwise.
162    bool success = !isLocked;
163
164    // Iterate over list.  Note that there could be multiple matching
165    // records, as more than one context could have done a load locked
166    // to this location.
167    list<LockedAddr>::iterator i = lockedAddrList.begin();
168
169    while (i != lockedAddrList.end()) {
170
171        if (i->addr == paddr) {
172            // we have a matching address
173
174            if (isLocked && i->matchesContext(req)) {
175                // it's a store conditional, and as far as the memory
176                // system can tell, the requesting context's lock is
177                // still valid.
178                DPRINTF(LLSC, "StCond success: cpu %d thread %d addr %#x\n",
179                        req->getCpuNum(), req->getThreadNum(), paddr);
180                success = true;
181            }
182
183            // Get rid of our record of this lock and advance to next
184            DPRINTF(LLSC, "Erasing lock record: cpu %d thread %d addr %#x\n",
185                    i->cpuNum, i->threadNum, paddr);
186            i = lockedAddrList.erase(i);
187        }
188        else {
189            // no match: advance to next record
190            ++i;
191        }
192    }
193
194    if (isLocked) {
195        req->setExtraData(success ? 1 : 0);
196    }
197
198    return success;
199}
200
201void
202PhysicalMemory::doFunctionalAccess(PacketPtr pkt)
203{
204    assert(pkt->getAddr() >= start() &&
205           pkt->getAddr() + pkt->getSize() <= start() + size());
206
207    if (pkt->isRead()) {
208        if (pkt->req->isLocked()) {
209            trackLoadLocked(pkt->req);
210        }
211        memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(),
212               pkt->getSize());
213#if TRACING_ON
214        switch (pkt->getSize()) {
215          case sizeof(uint64_t):
216            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
217                    pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
218            break;
219          case sizeof(uint32_t):
220            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
221                    pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
222            break;
223          case sizeof(uint16_t):
224            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
225                    pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
226            break;
227          case sizeof(uint8_t):
228            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
229                    pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
230            break;
231          default:
232            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x\n",
233                    pkt->getSize(), pkt->getAddr());
234        }
235#endif
236    }
237    else if (pkt->isWrite()) {
238        if (writeOK(pkt->req)) {
239                memcpy(pmemAddr + pkt->getAddr() - start(), pkt->getPtr<uint8_t>(),
240                        pkt->getSize());
241#if TRACING_ON
242            switch (pkt->getSize()) {
243              case sizeof(uint64_t):
244                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
245                        pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
246                break;
247              case sizeof(uint32_t):
248                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
249                        pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
250                break;
251              case sizeof(uint16_t):
252                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
253                        pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
254                break;
255              case sizeof(uint8_t):
256                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
257                        pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
258                break;
259              default:
260                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x\n",
261                        pkt->getSize(), pkt->getAddr());
262            }
263#endif
264        }
265    } else if (pkt->isInvalidate()) {
266        //upgrade or invalidate
267        pkt->flags |= SATISFIED;
268    } else if (pkt->isReadWrite()) {
269        IntReg overwrite_val;
270        bool overwrite_mem;
271        uint64_t condition_val64;
272        uint32_t condition_val32;
273
274        assert(sizeof(IntReg) >= pkt->getSize());
275
276        overwrite_mem = true;
277        // keep a copy of our possible write value, and copy what is at the
278        // memory address into the packet
279        std::memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize());
280        std::memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(),
281               pkt->getSize());
282
283        if (pkt->req->isCondSwap()) {
284            if (pkt->getSize() == sizeof(uint64_t)) {
285                condition_val64 = pkt->req->getExtraData();
286                overwrite_mem = !std::memcmp(&condition_val64, pmemAddr +
287                        pkt->getAddr() - start(), sizeof(uint64_t));
288            } else if (pkt->getSize() == sizeof(uint32_t)) {
289                condition_val32 = (uint32_t)pkt->req->getExtraData();
290                overwrite_mem = !std::memcmp(&condition_val32, pmemAddr +
291                        pkt->getAddr() - start(), sizeof(uint32_t));
292            } else
293                panic("Invalid size for conditional read/write\n");
294        }
295
296        if (overwrite_mem)
297            std::memcpy(pmemAddr + pkt->getAddr() - start(),
298               &overwrite_val, pkt->getSize());
299
300#if TRACING_ON
301        switch (pkt->getSize()) {
302          case sizeof(uint64_t):
303            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
304                    pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
305            DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n",
306                    overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't",
307                    condition_val64, overwrite_mem ? "happened" : "didn't happen");
308            break;
309          case sizeof(uint32_t):
310            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
311                    pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
312            DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n",
313                    overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't",
314                    condition_val32, overwrite_mem ? "happened" : "didn't happen");
315            break;
316          case sizeof(uint16_t):
317            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
318                    pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
319            DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n",
320                    overwrite_mem);
321            break;
322          case sizeof(uint8_t):
323            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
324                    pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
325            DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n",
326                    overwrite_mem);
327            break;
328          default:
329            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x\n",
330                    pkt->getSize(), pkt->getAddr());
331        }
332#endif
333    } else {
334        panic("unimplemented");
335    }
336
337    pkt->result = Packet::Success;
338}
339
340Port *
341PhysicalMemory::getPort(const std::string &if_name, int idx)
342{
343    // Accept request for "functional" port for backwards compatibility
344    // with places where this function is called from C++.  I'd prefer
345    // to move all these into Python someday.
346    if (if_name == "functional") {
347        return new MemoryPort(csprintf("%s-functional", name()), this);
348    }
349
350    if (if_name != "port") {
351        panic("PhysicalMemory::getPort: unknown port %s requested", if_name);
352    }
353
354    if (idx >= ports.size()) {
355        ports.resize(idx+1);
356    }
357
358    if (ports[idx] != NULL) {
359        panic("PhysicalMemory::getPort: port %d already assigned", idx);
360    }
361
362    MemoryPort *port =
363        new MemoryPort(csprintf("%s-port%d", name(), idx), this);
364
365    ports[idx] = port;
366    return port;
367}
368
369
370void
371PhysicalMemory::recvStatusChange(Port::Status status)
372{
373}
374
375PhysicalMemory::MemoryPort::MemoryPort(const std::string &_name,
376                                       PhysicalMemory *_memory)
377    : SimpleTimingPort(_name), memory(_memory)
378{ }
379
380void
381PhysicalMemory::MemoryPort::recvStatusChange(Port::Status status)
382{
383    memory->recvStatusChange(status);
384}
385
386void
387PhysicalMemory::MemoryPort::getDeviceAddressRanges(AddrRangeList &resp,
388                                                   bool &snoop)
389{
390    memory->getAddressRanges(resp, snoop);
391}
392
393void
394PhysicalMemory::getAddressRanges(AddrRangeList &resp, bool &snoop)
395{
396    snoop = false;
397    resp.clear();
398    resp.push_back(RangeSize(start(), params()->addrRange.size()));
399}
400
401int
402PhysicalMemory::MemoryPort::deviceBlockSize()
403{
404    return memory->deviceBlockSize();
405}
406
407Tick
408PhysicalMemory::MemoryPort::recvAtomic(PacketPtr pkt)
409{
410    memory->doFunctionalAccess(pkt);
411    return memory->calculateLatency(pkt);
412}
413
414void
415PhysicalMemory::MemoryPort::recvFunctional(PacketPtr pkt)
416{
417    //Since we are overriding the function, make sure to have the impl of the
418    //check or functional accesses here.
419    std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin();
420    std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end();
421    bool notDone = true;
422
423    while (i != end && notDone) {
424        PacketPtr target = i->second;
425        // If the target contains data, and it overlaps the
426        // probed request, need to update data
427        if (target->intersect(pkt))
428            notDone = fixPacket(pkt, target);
429        i++;
430    }
431
432    // Default implementation of SimpleTimingPort::recvFunctional()
433    // calls recvAtomic() and throws away the latency; we can save a
434    // little here by just not calculating the latency.
435    memory->doFunctionalAccess(pkt);
436}
437
438unsigned int
439PhysicalMemory::drain(Event *de)
440{
441    int count = 0;
442    for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
443        count += (*pi)->drain(de);
444    }
445
446    if (count)
447        changeState(Draining);
448    else
449        changeState(Drained);
450    return count;
451}
452
453void
454PhysicalMemory::serialize(ostream &os)
455{
456    gzFile compressedMem;
457    string filename = name() + ".physmem";
458
459    SERIALIZE_SCALAR(filename);
460
461    // write memory file
462    string thefile = Checkpoint::dir() + "/" + filename.c_str();
463    int fd = creat(thefile.c_str(), 0664);
464    if (fd < 0) {
465        perror("creat");
466        fatal("Can't open physical memory checkpoint file '%s'\n", filename);
467    }
468
469    compressedMem = gzdopen(fd, "wb");
470    if (compressedMem == NULL)
471        fatal("Insufficient memory to allocate compression state for %s\n",
472                filename);
473
474    if (gzwrite(compressedMem, pmemAddr, params()->addrRange.size()) != params()->addrRange.size()) {
475        fatal("Write failed on physical memory checkpoint file '%s'\n",
476              filename);
477    }
478
479    if (gzclose(compressedMem))
480        fatal("Close failed on physical memory checkpoint file '%s'\n",
481              filename);
482}
483
484void
485PhysicalMemory::unserialize(Checkpoint *cp, const string &section)
486{
487    gzFile compressedMem;
488    long *tempPage;
489    long *pmem_current;
490    uint64_t curSize;
491    uint32_t bytesRead;
492    const int chunkSize = 16384;
493
494
495    string filename;
496
497    UNSERIALIZE_SCALAR(filename);
498
499    filename = cp->cptDir + "/" + filename;
500
501    // mmap memoryfile
502    int fd = open(filename.c_str(), O_RDONLY);
503    if (fd < 0) {
504        perror("open");
505        fatal("Can't open physical memory checkpoint file '%s'", filename);
506    }
507
508    compressedMem = gzdopen(fd, "rb");
509    if (compressedMem == NULL)
510        fatal("Insufficient memory to allocate compression state for %s\n",
511                filename);
512
513    // unmap file that was mmaped in the constructor
514    // This is done here to make sure that gzip and open don't muck with our
515    // nice large space of memory before we reallocate it
516    munmap((char*)pmemAddr, params()->addrRange.size());
517
518    pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
519                                MAP_ANON | MAP_PRIVATE, -1, 0);
520
521    if (pmemAddr == (void *)MAP_FAILED) {
522        perror("mmap");
523        fatal("Could not mmap physical memory!\n");
524    }
525
526    curSize = 0;
527    tempPage = (long*)malloc(chunkSize);
528    if (tempPage == NULL)
529        fatal("Unable to malloc memory to read file %s\n", filename);
530
531    /* Only copy bytes that are non-zero, so we don't give the VM system hell */
532    while (curSize < params()->addrRange.size()) {
533        bytesRead = gzread(compressedMem, tempPage, chunkSize);
534        if (bytesRead != chunkSize && bytesRead != params()->addrRange.size() - curSize)
535            fatal("Read failed on physical memory checkpoint file '%s'"
536                  " got %d bytes, expected %d or %d bytes\n",
537                  filename, bytesRead, chunkSize, params()->addrRange.size()-curSize);
538
539        assert(bytesRead % sizeof(long) == 0);
540
541        for (int x = 0; x < bytesRead/sizeof(long); x++)
542        {
543             if (*(tempPage+x) != 0) {
544                 pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long));
545                 *pmem_current = *(tempPage+x);
546             }
547        }
548        curSize += bytesRead;
549    }
550
551    free(tempPage);
552
553    if (gzclose(compressedMem))
554        fatal("Close failed on physical memory checkpoint file '%s'\n",
555              filename);
556
557}
558
559
560BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
561
562    Param<string> file;
563    Param<Range<Addr> > range;
564    Param<Tick> latency;
565    Param<bool> zero;
566
567END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
568
569BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
570
571    INIT_PARAM_DFLT(file, "memory mapped file", ""),
572    INIT_PARAM(range, "Device Address Range"),
573    INIT_PARAM(latency, "Memory access latency"),
574    INIT_PARAM(zero, "Zero initialize memory")
575
576END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
577
578CREATE_SIM_OBJECT(PhysicalMemory)
579{
580    PhysicalMemory::Params *p = new PhysicalMemory::Params;
581    p->name = getInstanceName();
582    p->addrRange = range;
583    p->latency = latency;
584    p->zero = zero;
585    return new PhysicalMemory(p);
586}
587
588REGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory)
589