physical.cc revision 4467
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 *          Ali Saidi
30 */
31
32#include <sys/types.h>
33#include <sys/mman.h>
34#include <errno.h>
35#include <fcntl.h>
36#include <unistd.h>
37#include <zlib.h>
38
39#include <iostream>
40#include <string>
41
42#include "arch/isa_traits.hh"
43#include "base/misc.hh"
44#include "config/full_system.hh"
45#include "mem/packet_access.hh"
46#include "mem/physical.hh"
47#include "sim/builder.hh"
48#include "sim/eventq.hh"
49#include "sim/host.hh"
50
51using namespace std;
52using namespace TheISA;
53
54PhysicalMemory::PhysicalMemory(Params *p)
55    : MemObject(p->name), pmemAddr(NULL), lat(p->latency), _params(p)
56{
57    if (params()->addrRange.size() % TheISA::PageBytes != 0)
58        panic("Memory Size not divisible by page size\n");
59
60    int map_flags = MAP_ANON | MAP_PRIVATE;
61    pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
62            map_flags, -1, 0);
63
64    if (pmemAddr == (void *)MAP_FAILED) {
65        perror("mmap");
66        fatal("Could not mmap!\n");
67    }
68
69    //If requested, initialize all the memory to 0
70    if(params()->zero)
71        memset(pmemAddr, 0, params()->addrRange.size());
72
73    pagePtr = 0;
74}
75
76void
77PhysicalMemory::init()
78{
79    for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
80        if (*pi)
81            (*pi)->sendStatusChange(Port::RangeChange);
82    }
83}
84
85PhysicalMemory::~PhysicalMemory()
86{
87    if (pmemAddr)
88        munmap((char*)pmemAddr, params()->addrRange.size());
89    //Remove memPorts?
90}
91
92Addr
93PhysicalMemory::new_page()
94{
95    Addr return_addr = pagePtr << LogVMPageSize;
96    return_addr += start();
97
98    ++pagePtr;
99    return return_addr;
100}
101
102int
103PhysicalMemory::deviceBlockSize()
104{
105    //Can accept anysize request
106    return 0;
107}
108
109Tick
110PhysicalMemory::calculateLatency(PacketPtr pkt)
111{
112    return lat;
113}
114
115
116
117// Add load-locked to tracking list.  Should only be called if the
118// operation is a load and the LOCKED flag is set.
119void
120PhysicalMemory::trackLoadLocked(Request *req)
121{
122    Addr paddr = LockedAddr::mask(req->getPaddr());
123
124    // first we check if we already have a locked addr for this
125    // xc.  Since each xc only gets one, we just update the
126    // existing record with the new address.
127    list<LockedAddr>::iterator i;
128
129    for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) {
130        if (i->matchesContext(req)) {
131            DPRINTF(LLSC, "Modifying lock record: cpu %d thread %d addr %#x\n",
132                    req->getCpuNum(), req->getThreadNum(), paddr);
133            i->addr = paddr;
134            return;
135        }
136    }
137
138    // no record for this xc: need to allocate a new one
139    DPRINTF(LLSC, "Adding lock record: cpu %d thread %d addr %#x\n",
140            req->getCpuNum(), req->getThreadNum(), paddr);
141    lockedAddrList.push_front(LockedAddr(req));
142}
143
144
145// Called on *writes* only... both regular stores and
146// store-conditional operations.  Check for conventional stores which
147// conflict with locked addresses, and for success/failure of store
148// conditionals.
149bool
150PhysicalMemory::checkLockedAddrList(Request *req)
151{
152    Addr paddr = LockedAddr::mask(req->getPaddr());
153    bool isLocked = req->isLocked();
154
155    // Initialize return value.  Non-conditional stores always
156    // succeed.  Assume conditional stores will fail until proven
157    // otherwise.
158    bool success = !isLocked;
159
160    // Iterate over list.  Note that there could be multiple matching
161    // records, as more than one context could have done a load locked
162    // to this location.
163    list<LockedAddr>::iterator i = lockedAddrList.begin();
164
165    while (i != lockedAddrList.end()) {
166
167        if (i->addr == paddr) {
168            // we have a matching address
169
170            if (isLocked && i->matchesContext(req)) {
171                // it's a store conditional, and as far as the memory
172                // system can tell, the requesting context's lock is
173                // still valid.
174                DPRINTF(LLSC, "StCond success: cpu %d thread %d addr %#x\n",
175                        req->getCpuNum(), req->getThreadNum(), paddr);
176                success = true;
177            }
178
179            // Get rid of our record of this lock and advance to next
180            DPRINTF(LLSC, "Erasing lock record: cpu %d thread %d addr %#x\n",
181                    i->cpuNum, i->threadNum, paddr);
182            i = lockedAddrList.erase(i);
183        }
184        else {
185            // no match: advance to next record
186            ++i;
187        }
188    }
189
190    if (isLocked) {
191        req->setExtraData(success ? 1 : 0);
192    }
193
194    return success;
195}
196
197void
198PhysicalMemory::doFunctionalAccess(PacketPtr pkt)
199{
200    assert(pkt->getAddr() >= start() &&
201           pkt->getAddr() + pkt->getSize() <= start() + size());
202
203    if (pkt->isRead()) {
204        if (pkt->req->isLocked()) {
205            trackLoadLocked(pkt->req);
206        }
207        memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(),
208               pkt->getSize());
209#if TRACING_ON
210        switch (pkt->getSize()) {
211          case sizeof(uint64_t):
212            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
213                    pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
214            break;
215          case sizeof(uint32_t):
216            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
217                    pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
218            break;
219          case sizeof(uint16_t):
220            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
221                    pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
222            break;
223          case sizeof(uint8_t):
224            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n",
225                    pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
226            break;
227          default:
228            DPRINTF(MemoryAccess, "Read of size %i on address 0x%x\n",
229                    pkt->getSize(), pkt->getAddr());
230        }
231#endif
232    }
233    else if (pkt->isWrite()) {
234        if (writeOK(pkt->req)) {
235                memcpy(pmemAddr + pkt->getAddr() - start(), pkt->getPtr<uint8_t>(),
236                        pkt->getSize());
237#if TRACING_ON
238            switch (pkt->getSize()) {
239              case sizeof(uint64_t):
240                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
241                        pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
242                break;
243              case sizeof(uint32_t):
244                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
245                        pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
246                break;
247              case sizeof(uint16_t):
248                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
249                        pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
250                break;
251              case sizeof(uint8_t):
252                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n",
253                        pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
254                break;
255              default:
256                DPRINTF(MemoryAccess, "Write of size %i on address 0x%x\n",
257                        pkt->getSize(), pkt->getAddr());
258            }
259#endif
260        }
261    } else if (pkt->isInvalidate()) {
262        //upgrade or invalidate
263        pkt->flags |= SATISFIED;
264    } else if (pkt->isReadWrite()) {
265        IntReg overwrite_val;
266        bool overwrite_mem;
267        uint64_t condition_val64;
268        uint32_t condition_val32;
269
270        assert(sizeof(IntReg) >= pkt->getSize());
271
272        overwrite_mem = true;
273        // keep a copy of our possible write value, and copy what is at the
274        // memory address into the packet
275        std::memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize());
276        std::memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(),
277               pkt->getSize());
278
279        if (pkt->req->isCondSwap()) {
280            if (pkt->getSize() == sizeof(uint64_t)) {
281                condition_val64 = pkt->req->getExtraData();
282                overwrite_mem = !std::memcmp(&condition_val64, pmemAddr +
283                        pkt->getAddr() - start(), sizeof(uint64_t));
284            } else if (pkt->getSize() == sizeof(uint32_t)) {
285                condition_val32 = (uint32_t)pkt->req->getExtraData();
286                overwrite_mem = !std::memcmp(&condition_val32, pmemAddr +
287                        pkt->getAddr() - start(), sizeof(uint32_t));
288            } else
289                panic("Invalid size for conditional read/write\n");
290        }
291
292        if (overwrite_mem)
293            std::memcpy(pmemAddr + pkt->getAddr() - start(),
294               &overwrite_val, pkt->getSize());
295
296#if TRACING_ON
297        switch (pkt->getSize()) {
298          case sizeof(uint64_t):
299            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
300                    pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>());
301            DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n",
302                    overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't",
303                    condition_val64, overwrite_mem ? "happened" : "didn't happen");
304            break;
305          case sizeof(uint32_t):
306            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
307                    pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>());
308            DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n",
309                    overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't",
310                    condition_val32, overwrite_mem ? "happened" : "didn't happen");
311            break;
312          case sizeof(uint16_t):
313            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
314                    pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>());
315            DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n",
316                    overwrite_mem);
317            break;
318          case sizeof(uint8_t):
319            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n",
320                    pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>());
321            DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n",
322                    overwrite_mem);
323            break;
324          default:
325            DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x\n",
326                    pkt->getSize(), pkt->getAddr());
327        }
328#endif
329    } else {
330        panic("unimplemented");
331    }
332
333    pkt->result = Packet::Success;
334}
335
336Port *
337PhysicalMemory::getPort(const std::string &if_name, int idx)
338{
339    if (if_name != "port") {
340        panic("PhysicalMemory::getPort: unknown port %s requested", if_name);
341    }
342
343    if (idx >= ports.size()) {
344        ports.resize(idx+1);
345    }
346
347    if (ports[idx] != NULL) {
348        panic("PhysicalMemory::getPort: port %d already assigned", idx);
349    }
350
351    MemoryPort *port =
352        new MemoryPort(csprintf("%s-port%d", name(), idx), this);
353
354    ports[idx] = port;
355    return port;
356}
357
358
359void
360PhysicalMemory::recvStatusChange(Port::Status status)
361{
362}
363
364PhysicalMemory::MemoryPort::MemoryPort(const std::string &_name,
365                                       PhysicalMemory *_memory)
366    : SimpleTimingPort(_name), memory(_memory)
367{ }
368
369void
370PhysicalMemory::MemoryPort::recvStatusChange(Port::Status status)
371{
372    memory->recvStatusChange(status);
373}
374
375void
376PhysicalMemory::MemoryPort::getDeviceAddressRanges(AddrRangeList &resp,
377                                            AddrRangeList &snoop)
378{
379    memory->getAddressRanges(resp, snoop);
380}
381
382void
383PhysicalMemory::getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop)
384{
385    snoop.clear();
386    resp.clear();
387    resp.push_back(RangeSize(start(),
388                             params()->addrRange.size()));
389}
390
391int
392PhysicalMemory::MemoryPort::deviceBlockSize()
393{
394    return memory->deviceBlockSize();
395}
396
397Tick
398PhysicalMemory::MemoryPort::recvAtomic(PacketPtr pkt)
399{
400    memory->doFunctionalAccess(pkt);
401    return memory->calculateLatency(pkt);
402}
403
404void
405PhysicalMemory::MemoryPort::recvFunctional(PacketPtr pkt)
406{
407    //Since we are overriding the function, make sure to have the impl of the
408    //check or functional accesses here.
409    std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin();
410    std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end();
411    bool notDone = true;
412
413    while (i != end && notDone) {
414        PacketPtr target = i->second;
415        // If the target contains data, and it overlaps the
416        // probed request, need to update data
417        if (target->intersect(pkt))
418            notDone = fixPacket(pkt, target);
419        i++;
420    }
421
422    // Default implementation of SimpleTimingPort::recvFunctional()
423    // calls recvAtomic() and throws away the latency; we can save a
424    // little here by just not calculating the latency.
425    memory->doFunctionalAccess(pkt);
426}
427
428unsigned int
429PhysicalMemory::drain(Event *de)
430{
431    int count = 0;
432    for (PortIterator pi = ports.begin(); pi != ports.end(); ++pi) {
433        count += (*pi)->drain(de);
434    }
435
436    if (count)
437        changeState(Draining);
438    else
439        changeState(Drained);
440    return count;
441}
442
443void
444PhysicalMemory::serialize(ostream &os)
445{
446    gzFile compressedMem;
447    string filename = name() + ".physmem";
448
449    SERIALIZE_SCALAR(filename);
450
451    // write memory file
452    string thefile = Checkpoint::dir() + "/" + filename.c_str();
453    int fd = creat(thefile.c_str(), 0664);
454    if (fd < 0) {
455        perror("creat");
456        fatal("Can't open physical memory checkpoint file '%s'\n", filename);
457    }
458
459    compressedMem = gzdopen(fd, "wb");
460    if (compressedMem == NULL)
461        fatal("Insufficient memory to allocate compression state for %s\n",
462                filename);
463
464    if (gzwrite(compressedMem, pmemAddr, params()->addrRange.size()) != params()->addrRange.size()) {
465        fatal("Write failed on physical memory checkpoint file '%s'\n",
466              filename);
467    }
468
469    if (gzclose(compressedMem))
470        fatal("Close failed on physical memory checkpoint file '%s'\n",
471              filename);
472}
473
474void
475PhysicalMemory::unserialize(Checkpoint *cp, const string &section)
476{
477    gzFile compressedMem;
478    long *tempPage;
479    long *pmem_current;
480    uint64_t curSize;
481    uint32_t bytesRead;
482    const int chunkSize = 16384;
483
484
485    string filename;
486
487    UNSERIALIZE_SCALAR(filename);
488
489    filename = cp->cptDir + "/" + filename;
490
491    // mmap memoryfile
492    int fd = open(filename.c_str(), O_RDONLY);
493    if (fd < 0) {
494        perror("open");
495        fatal("Can't open physical memory checkpoint file '%s'", filename);
496    }
497
498    compressedMem = gzdopen(fd, "rb");
499    if (compressedMem == NULL)
500        fatal("Insufficient memory to allocate compression state for %s\n",
501                filename);
502
503    // unmap file that was mmaped in the constructor
504    // This is done here to make sure that gzip and open don't muck with our
505    // nice large space of memory before we reallocate it
506    munmap((char*)pmemAddr, params()->addrRange.size());
507
508    pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE,
509                                MAP_ANON | MAP_PRIVATE, -1, 0);
510
511    if (pmemAddr == (void *)MAP_FAILED) {
512        perror("mmap");
513        fatal("Could not mmap physical memory!\n");
514    }
515
516    curSize = 0;
517    tempPage = (long*)malloc(chunkSize);
518    if (tempPage == NULL)
519        fatal("Unable to malloc memory to read file %s\n", filename);
520
521    /* Only copy bytes that are non-zero, so we don't give the VM system hell */
522    while (curSize < params()->addrRange.size()) {
523        bytesRead = gzread(compressedMem, tempPage, chunkSize);
524        if (bytesRead != chunkSize && bytesRead != params()->addrRange.size() - curSize)
525            fatal("Read failed on physical memory checkpoint file '%s'"
526                  " got %d bytes, expected %d or %d bytes\n",
527                  filename, bytesRead, chunkSize, params()->addrRange.size()-curSize);
528
529        assert(bytesRead % sizeof(long) == 0);
530
531        for (int x = 0; x < bytesRead/sizeof(long); x++)
532        {
533             if (*(tempPage+x) != 0) {
534                 pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long));
535                 *pmem_current = *(tempPage+x);
536             }
537        }
538        curSize += bytesRead;
539    }
540
541    free(tempPage);
542
543    if (gzclose(compressedMem))
544        fatal("Close failed on physical memory checkpoint file '%s'\n",
545              filename);
546
547}
548
549
550BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
551
552    Param<string> file;
553    Param<Range<Addr> > range;
554    Param<Tick> latency;
555    Param<bool> zero;
556
557END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
558
559BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
560
561    INIT_PARAM_DFLT(file, "memory mapped file", ""),
562    INIT_PARAM(range, "Device Address Range"),
563    INIT_PARAM(latency, "Memory access latency"),
564    INIT_PARAM(zero, "Zero initialize memory")
565
566END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
567
568CREATE_SIM_OBJECT(PhysicalMemory)
569{
570    PhysicalMemory::Params *p = new PhysicalMemory::Params;
571    p->name = getInstanceName();
572    p->addrRange = range;
573    p->latency = latency;
574    p->zero = zero;
575    return new PhysicalMemory(p);
576}
577
578REGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory)
579